mb/intel/kunimitsu: Refactor to get rid of `pei_data`

The SoC specific `struct pei_data` was filled with values that were
later only consumed by the mainboard code again. Avoid jumping through
this hoop and fill FSP UPDs directly.

Change-Id: Ibc013ccea9f83ef29f22fe2da4c0d12096308636
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32590
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Nico Huber 2019-05-04 17:06:06 +02:00 committed by Patrick Georgi
parent 66318aad07
commit 9b5b9e46b9
6 changed files with 17 additions and 69 deletions

View File

@ -18,8 +18,6 @@ subdirs-y += spd
bootblock-y += bootblock_mainboard.c bootblock-y += bootblock_mainboard.c
romstage-y += pei_data.c
bootblock-$(CONFIG_CHROMEOS) += chromeos.c bootblock-$(CONFIG_CHROMEOS) += chromeos.c
verstage-$(CONFIG_CHROMEOS) += chromeos.c verstage-$(CONFIG_CHROMEOS) += chromeos.c
romstage-$(CONFIG_CHROMEOS) += chromeos.c romstage-$(CONFIG_CHROMEOS) += chromeos.c
@ -28,7 +26,6 @@ ramstage-$(CONFIG_CHROMEOS) += chromeos.c
ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC) += ec.c ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC) += ec.c
ramstage-y += mainboard.c ramstage-y += mainboard.c
ramstage-y += pei_data.c
ramstage-y += ramstage.c ramstage-y += ramstage.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c

View File

@ -1,29 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014 Google Inc.
* Copyright (C) 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <stdint.h>
#include <soc/pei_data.h>
#include <soc/pei_wrapper.h>
#include "boardid.h"
#include "spd/spd.h"
void mainboard_fill_pei_data(struct pei_data *pei_data)
{
mainboard_fill_dq_map_data(&pei_data->dq_map);
mainboard_fill_dqs_map_data(&pei_data->dqs_map);
mainboard_fill_rcomp_res_data(&pei_data->RcompResistor);
mainboard_fill_rcomp_strength_data(&pei_data->RcompTarget);
}

View File

@ -15,20 +15,13 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
#include <string.h>
#include <gpio.h> #include <gpio.h>
#include <soc/pei_data.h>
#include <soc/pei_wrapper.h>
#include <soc/romstage.h> #include <soc/romstage.h>
#include "gpio.h" #include "gpio.h"
#include "spd/spd.h" #include "spd/spd.h"
void mainboard_romstage_entry(struct romstage_params *params) void mainboard_romstage_entry(struct romstage_params *params)
{ {
params->pei_data->mem_cfg_id = get_spd_index();
/* Fill out PEI DATA */
mainboard_fill_pei_data(params->pei_data);
mainboard_fill_spd_data(params->pei_data);
/* Initialize memory */ /* Initialize memory */
romstage_common(params); romstage_common(params);
} }
@ -36,24 +29,11 @@ void mainboard_romstage_entry(struct romstage_params *params)
void mainboard_memory_init_params(struct romstage_params *params, void mainboard_memory_init_params(struct romstage_params *params,
MEMORY_INIT_UPD *memory_params) MEMORY_INIT_UPD *memory_params)
{ {
if (params->pei_data->spd_data[0][0][0] != 0) { spd_memory_init_params(memory_params);
memory_params->MemorySpdPtr00 = mainboard_fill_dq_map_data(&memory_params->DqByteMapCh0);
(UINT32)(params->pei_data->spd_data[0][0]); mainboard_fill_dqs_map_data(&memory_params->DqsMapCpu2DramCh0);
memory_params->MemorySpdPtr10 = mainboard_fill_rcomp_res_data(&memory_params->RcompResistor);
(UINT32)(params->pei_data->spd_data[1][0]); mainboard_fill_rcomp_strength_data(&memory_params->RcompTarget);
}
memcpy(memory_params->DqByteMapCh0, params->pei_data->dq_map[0],
sizeof(params->pei_data->dq_map[0]));
memcpy(memory_params->DqByteMapCh1, params->pei_data->dq_map[1],
sizeof(params->pei_data->dq_map[1]));
memcpy(memory_params->DqsMapCpu2DramCh0, params->pei_data->dqs_map[0],
sizeof(params->pei_data->dqs_map[0]));
memcpy(memory_params->DqsMapCpu2DramCh1, params->pei_data->dqs_map[1],
sizeof(params->pei_data->dqs_map[1]));
memcpy(memory_params->RcompResistor, params->pei_data->RcompResistor,
sizeof(params->pei_data->RcompResistor));
memcpy(memory_params->RcompTarget, params->pei_data->RcompTarget,
sizeof(params->pei_data->RcompTarget));
memory_params->MemorySpdDataLen = SPD_LEN; memory_params->MemorySpdDataLen = SPD_LEN;
memory_params->DqPinsInterleaved = FALSE; memory_params->DqPinsInterleaved = FALSE;
} }

View File

@ -16,8 +16,9 @@
#include <arch/byteorder.h> #include <arch/byteorder.h>
#include <console/console.h> #include <console/console.h>
#include <soc/pei_data.h> #include <fsp/soc_binding.h>
#include <soc/romstage.h> #include <soc/romstage.h>
#include <stdint.h>
#include <string.h> #include <string.h>
#include "spd.h" #include "spd.h"
@ -73,20 +74,19 @@ static void mainboard_print_spd_info(uint8_t spd[])
} }
} }
/* Copy SPD data for on-board memory */ /* Fill SPD pointers for on-board memory */
void mainboard_fill_spd_data(struct pei_data *pei_data) void spd_memory_init_params(MEMORY_INIT_UPD *memory_params)
{ {
uintptr_t spd_data; uintptr_t spd_data;
spd_data = mainboard_get_spd_data(); spd_data = mainboard_get_spd_data();
memcpy(pei_data->spd_data[0][0], (void *)spd_data, SPD_LEN);
if (mainboard_has_dual_channel_mem())
memcpy(pei_data->spd_data[1][0], (void *)spd_data, SPD_LEN);
/* Make sure a valid SPD was found */ /* Make sure a valid SPD was found */
if (pei_data->spd_data[0][0][0] == 0) if (*(uint8_t *)spd_data == 0)
die("Invalid SPD data."); die("Invalid SPD data.");
mainboard_print_spd_info(pei_data->spd_data[0][0]); memory_params->MemorySpdPtr00 = spd_data;
if (mainboard_has_dual_channel_mem())
memory_params->MemorySpdPtr10 = spd_data;
mainboard_print_spd_info((uint8_t *)spd_data);
} }

View File

@ -16,6 +16,7 @@
#ifndef MAINBOARD_SPD_H #ifndef MAINBOARD_SPD_H
#include <fsp/soc_binding.h>
#include <gpio.h> #include <gpio.h>
#include "../gpio.h" #include "../gpio.h"
@ -53,6 +54,7 @@ static inline int get_spd_index(void) {
}; };
return (gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios))); return (gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios)));
} }
void spd_memory_init_params(MEMORY_INIT_UPD *memory_params);
void mainboard_fill_dq_map_data(void *dq_map_ptr); void mainboard_fill_dq_map_data(void *dq_map_ptr);
void mainboard_fill_dqs_map_data(void *dqs_map_ptr); void mainboard_fill_dqs_map_data(void *dqs_map_ptr);
void mainboard_fill_rcomp_res_data(void *rcomp_ptr); void mainboard_fill_rcomp_res_data(void *rcomp_ptr);

View File

@ -17,8 +17,6 @@
#include <console/console.h> #include <console/console.h>
#include <stdint.h> #include <stdint.h>
#include <string.h> #include <string.h>
#include <soc/pei_data.h>
#include <soc/pei_wrapper.h>
#include "boardid.h" #include "boardid.h"
#include "spd.h" #include "spd.h"