sb/intel/lynxpoint: Correct read width in RMW cycle

The register is 32 bits wide, so do not read 16 bits out of it.
LynxPoint PCH reference code version 1.9.1 always uses 32-bit accesses.

Change-Id: I18fbba0603579417e09ae4eb4eb273f7fcd903fc
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47098
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/southbridge/intel/lynxpoint/sata.c

@@ -74,7 +74,7 @@ static void sata_init(struct device *dev)
 	udelay(2);
 
 	/* Setup register 98h */
-	reg32 = pci_read_config16(dev, 0x98);
+	reg32 = pci_read_config32(dev, 0x98);
 	reg32 |= 1 << 19;    /* BWG step 6 */
 	reg32 |= 1 << 22;    /* BWG step 5 */
 	reg32 &= ~(0x3f << 7);