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soc/intel/cannonlake: add *spi.c files to make 

Adds spi.c and gspi.c to verstage.

Change-Id: I363d9aafa989c5a7a0b36ad9edf1c70a75604d28
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/21284
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Nick Vaccaro 2017-08-29 19:55:57 -07:00 committed by Aaron Durbin
parent 69b5cdb33c
commit 9b675796a7
1 changed files with 3 additions and 0 deletions
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src/soc/intel/cannonlake/Makefile.inc
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@ -44,6 +44,9 @@ postcar-y += pmutil.c
postcar-y += spi.c postcar-y += spi.c
postcar-$(CONFIG_UART_DEBUG) += uart.c postcar-$(CONFIG_UART_DEBUG) += uart.c
verstage-y += gspi.c
verstage-y += spi.c
CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include/fsp20 CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include/fsp20
CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/cannonlake CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/cannonlake