mb/google/dedede/var/pirika: Add USB2 PHY parameters
This change adds fine-tuned USB2 PHY parameters for pirika. BUG=192601233 TEST=Built and verified USB2 eye diagram test result Signed-off-by: Alex1 Kao <alex1_kao@pegatron.corp-partner.google.com> Change-Id: Icf9fb41cd0ae40728e4ec5bd72a15ec3c45c963b Reviewed-on: https://review.coreboot.org/c/coreboot/+/56327 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kirk Wang <kirk_wang@pegatron.corp-partner.google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
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@ -37,7 +37,19 @@ chip soc/intel/jasperlake
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# USB Port Configuration
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register "usb2_ports[2]" = "{
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.enable = 1,
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.ocpin = OC_SKIP,
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.pre_emp_bias = USB2_BIAS_28P15MV,
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.pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
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}" # Type-A
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register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Camera
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register "usb2_ports[7]" = "{
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.enable = 1,
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.ocpin = OC_SKIP,
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.pre_emp_bias = USB2_BIAS_11P25MV,
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.pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
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}" # Integrated Bluetooth
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register "tcc_offset" = "8" # TCC of 97C
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