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mb/google/brya: Remove BT PCI interface and add BT flag 

Remove the CNVi BT PCI config and add Bt flag.
There is no PCI host interface in this version of CNVi.
TEST: BT is checked using 'lsusb -d 8087:0026' from OS.

Change-Id: I7e8ca1bb6a57721a72478137612d7a9c391ca0b2
Signed-off-by: Cliff Huang <cliff.huang@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51358
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Cliff Huang 2021-03-08 15:22:00 -08:00 committed by Patrick Georgi
parent b1a128fc88
commit 9b725cf311
1 changed files with 3 additions and 1 deletions
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4
src/mainboard/google/brya/variants/baseboard/devicetree.cb
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@ -24,6 +24,9 @@ chip soc/intel/alderlake
register "gpio_pm[COMM_4]" = "0" register "gpio_pm[COMM_4]" = "0"
register "gpio_pm[COMM_5]" = "0" register "gpio_pm[COMM_5]" = "0"
# Enable CNVi BT
register "CnviBtCore" = "true"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" # USB2_C0 register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" # USB2_C0
register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC1)" # USB2_C1 register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC1)" # USB2_C1
register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC2)" # USB2_C2 register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC2)" # USB2_C2
@ -103,7 +106,6 @@ chip soc/intel/alderlake
device ref tcss_xhci on end device ref tcss_xhci on end
device ref tcss_dma0 on end device ref tcss_dma0 on end
device ref tcss_dma1 on end device ref tcss_dma1 on end
device ref cnvi_bt on end
device ref xhci on end device ref xhci on end
device ref shared_sram on end device ref shared_sram on end
device ref cnvi_wifi on device ref cnvi_wifi on