cpu/x86: add a barrier with timeout
In case something goes wrong on one of the cpus, add the ability to use a barrier with timeout so that other cpus don't wait forever. Remove static from barrier wait and release. BUG=chrome-os-partner:59875 BRANCH=reef TEST=None Change-Id: Iab6bd30ddf7632c7a5785b338798960c26016b24 Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Reviewed-on: https://review.coreboot.org/18107 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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@ -138,14 +138,37 @@ struct cpu_map {
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/* Keep track of APIC and device structure for each CPU. */
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static struct cpu_map cpus[CONFIG_MAX_CPUS];
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static inline void barrier_wait(atomic_t *b)
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inline void barrier_wait(atomic_t *b)
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{
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while (atomic_read(b) == 0)
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asm ("pause");
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mfence();
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}
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static inline void release_barrier(atomic_t *b)
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/* Returns 1 if timeout occurs before barier is released.
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* returns 0 if barrier is released before timeout. */
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int barrier_wait_timeout(atomic_t *b, uint32_t timeout_ms)
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{
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int timeout = 0;
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struct mono_time current, end;
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timer_monotonic_get(¤t);
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end = current;
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mono_time_add_msecs(&end, timeout_ms);
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while ((atomic_read(b) == 0) && (!mono_time_after(¤t, &end))) {
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timer_monotonic_get(¤t);
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asm ("pause");
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}
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mfence();
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if (mono_time_after(¤t, &end))
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timeout = 1;
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return timeout;
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}
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inline void release_barrier(atomic_t *b)
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{
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mfence();
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atomic_set(b, 1);
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@ -150,5 +150,15 @@ int mp_park_aps(void);
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void smm_initiate_relocation_parallel(void);
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/* Send SMI to self with single execution. */
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void smm_initiate_relocation(void);
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/* Make a CPU wait until the barrier is released */
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void barrier_wait(atomic_t *b);
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/*
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* Make a CPU wait until the barrier is released, or timeout occurs
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* returns 1 if timeout occurs before barier is released.
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* returns 0 if barrier is released before timeout.
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*/
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int barrier_wait_timeout(atomic_t *b, uint32_t timeout_ms);
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/* Release a barrier so that other CPUs waiting for that barrier can continue */
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void release_barrier(atomic_t *b);
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#endif /* _X86_MP_H_ */
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