mb/google/mancomb: Update GPIO configuration
BUG=b:182211161 TEST=builds Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: Ie3917c10ecf37c914dbadce5949b8f4f772abd5c Reviewed-on: https://review.coreboot.org/c/coreboot/+/52177 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mathew King <mathewk@chromium.org>
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1 changed files with 11 additions and 3 deletions
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@ -53,8 +53,8 @@ static const struct soc_amd_gpio base_gpio_table[] = {
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/* HUB_RST_L */
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PAD_GPO(GPIO_24, LOW),
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/* GPIO_25: Not available */
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/* PCIE_RST0_L */
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PAD_NF(GPIO_26, PCIE_RST_L, PULL_NONE),
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/* TODO: change back to PCIE_RST_L when we figure out why PCIE_RST doesn't go high. */
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PAD_GPO(GPIO_26, HIGH),
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/* PCIE_RST1_L */
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PAD_NF(GPIO_27, PCIE_RST1_L, PULL_NONE),
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/* GPIO_28: Not available */
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@ -93,7 +93,7 @@ static const struct soc_amd_gpio base_gpio_table[] = {
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PAD_GPI(GPIO_84, PULL_NONE),
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/* AGPIO85 */
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PAD_NC(GPIO_85),
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/* SPI_CLK2 */
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/* ESPI_SOC_CLK */
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PAD_NF(GPIO_86, SPI_CLK, PULL_NONE),
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/* AGPIO87 */
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PAD_NC(GPIO_87),
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@ -116,6 +116,8 @@ static const struct soc_amd_gpio base_gpio_table[] = {
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PAD_NF(GPIO_106, EMMC_SPI2_WP_L_ESPI2_D2, PULL_NONE),
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/* ESPI1_DATA3 */
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PAD_NF(GPIO_107, SPI2_HOLD_L_ESPI2_D3, PULL_NONE),
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/* ESPI_ALERT_L */
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PAD_NF(GPIO_108, ESPI_ALERT_D1, PULL_NONE),
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/* EGPIO109 */
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PAD_NC(GPIO_109),
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/* GPIO_110 - GPIO_112: Not available */
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@ -169,6 +171,12 @@ static const struct soc_amd_gpio early_gpio_table[] = {
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PAD_NF(GPIO_19, I2C3_SCL, PULL_NONE),
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/* I2C3_SDA */
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PAD_NF(GPIO_20, I2C3_SDA, PULL_NONE),
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/* PCIE_RST0_L */
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PAD_GPO(GPIO_26, HIGH),
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/* ESPI_CS_L */
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PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE),
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/* ESPI_SOC_CLK */
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PAD_NF(GPIO_86, SPI_CLK, PULL_NONE),
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/* ESPI1_DATA0 */
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PAD_NF(GPIO_104, SPI2_DO_ESPI2_D0, PULL_NONE),
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/* ESPI1_DATA1 */
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