From 9b8d28f013b9540ab89578e0ea317054d4ae106e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Sat, 26 Oct 2019 10:44:33 +0200 Subject: [PATCH] soc/intel/apollolake: set FSP param to enable or skip GOP MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Set the FSP parameter PeiGraphicsPeimInit according to RUN_FSP_GOP to enable or skip GOP. Change-Id: I3546371dd18120e3fbd1179a79b2bdc0a7436726 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/36352 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/soc/intel/apollolake/chip.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 8e516f8a84..1aab8a1b7a 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -751,6 +751,12 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd) /* Set VTD feature according to devicetree */ silconfig->VtdEnable = cfg->enable_vtd; + dev = pcidev_path_on_root(SA_DEVFN_IGD); + if (CONFIG(RUN_FSP_GOP) && dev && dev->enabled) + silconfig->PeiGraphicsPeimInit = 1; + else + silconfig->PeiGraphicsPeimInit = 0; + mainboard_silicon_init_params(silconfig); }