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mb/google/hatch: Set FPS as wake source 

BUG=b:142131099
BRANCH=None
TEST=powerd_dbus_suspend, ensure DUT in S0ix
     touch fp sensor and ensure DUT wakes up in S0

Change-Id: If57094aa1076d79ac0886b71fa5532411bfeb45f
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35903
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
This commit is contained in:
Shelley Chen 2019-10-08 14:17:26 -07:00
parent 86b683a888
commit 9b93383f5b
5 changed files with 9 additions and 5 deletions
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2
src/mainboard/google/hatch/variants/baseboard/gpio.c
View File

@ -59,7 +59,7 @@ static const struct pad_config gpio_table[] = {
/* A22 : FPMCU_PCH_BOOT0 */
PAD_CFG_GPO(GPP_A22, 0, DEEP),
/* A23 : FPMCU_PCH_INT_ODL */
PAD_CFG_GPI_APIC(GPP_A23, NONE, PLTRST, LEVEL, INVERT),
PAD_CFG_GPI_IRQ_WAKE(GPP_A23, NONE, PLTRST, LEVEL, INVERT),
/* B0 : CORE_VID0 */
PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1),

3
src/mainboard/google/hatch/variants/dratini/overridetree.cb
View File

@ -140,7 +140,8 @@ chip soc/intel/cannonlake
register "hid" = "ACPI_DT_NAMESPACE_HID"
register "uid" = "1"
register "compat_string" = ""google,cros-ec-spi""
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A23_IRQ)"
register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A23_IRQ)"
register "wake" = "GPE0_DW0_23"
device spi 1 on end
end # FPMCU
end # GSPI #1

3
src/mainboard/google/hatch/variants/hatch/overridetree.cb
View File

@ -171,7 +171,8 @@ chip soc/intel/cannonlake
register "hid" = "ACPI_DT_NAMESPACE_HID"
register "uid" = "1"
register "compat_string" = ""google,cros-ec-spi""
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A23_IRQ)"
register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A23_IRQ)"
register "wake" = "GPE0_DW0_23"
device spi 1 on end
end # FPMCU
end # GSPI #1

3
src/mainboard/google/hatch/variants/helios/overridetree.cb
View File

@ -180,7 +180,8 @@ chip soc/intel/cannonlake
register "hid" = "ACPI_DT_NAMESPACE_HID"
register "uid" = "1"
register "compat_string" = ""google,cros-ec-spi""
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A23_IRQ)"
register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A23_IRQ)"
register "wake" = "GPE0_DW0_23"
device spi 1 on end
end # FPMCU
end # GSPI #1

3
src/mainboard/google/hatch/variants/kohaku/overridetree.cb
View File

@ -238,7 +238,8 @@ chip soc/intel/cannonlake
register "hid" = "ACPI_DT_NAMESPACE_HID"
register "uid" = "1"
register "compat_string" = ""google,cros-ec-spi""
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A23_IRQ)"
register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A23_IRQ)"
register "wake" = "GPE0_DW0_23"
device spi 1 on end
end # FPMCU
end # GSPI #1