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mb/google/hatch/var/scout: Update DPTF parameters 

Update the DPTF parameters received from the thermal team. Refer to
https://partnerissuetracker.corp.google.com/issues/195602767#comment6.

BUG=b:195602767
TEST=emerge-ambassador coreboot

Signed-off-by: Kenneth Chan <kenneth.chan@quanta.corp-partner.google.com>
Change-Id: I93fe388ff1862d0a96b11ce68a5d28664f11996a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60834
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Kenneth Chan 2022-01-06 16:42:48 +08:00 committed by Felix Held
parent da3edab901
commit 9b9fe92e28
1 changed files with 5 additions and 5 deletions
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10
src/mainboard/google/hatch/variants/scout/overridetree.cb
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@ -241,12 +241,12 @@ chip soc/intel/cannonlake
register "policies.active[0]" = "{.target=DPTF_CPU,
.thresholds={TEMP_PCT(94, 0),}}"
register "policies.active[1]" = "{.target=DPTF_TEMP_SENSOR_0,
.thresholds={TEMP_PCT(84, 90),
TEMP_PCT(82, 80),
.thresholds={TEMP_PCT(82, 80),
TEMP_PCT(80, 70),
TEMP_PCT(66, 60),
TEMP_PCT(52, 50),
TEMP_PCT(35, 40),}}"
TEMP_PCT(78, 60),
TEMP_PCT(75, 50),
TEMP_PCT(73, 40),
TEMP_PCT(35, 30),}}"
## Passive Policy
register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 95, 5000)"