spi: Add GigaDevice GD25LQ64C/GD25LB64C SPI ROM support

GD25LQ64C and GD25LB64C have the same ID and settings.

BUG=chrome-os-partner:25907
BRANCH=baytrail
TEST=Boot  with GD25LQ64 and check MRC data save/restore works.

Change-Id: I8a4aa7cabd9a7657c2f0bae255a87341db3f1061
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 20b5896adbbbdedcb1b7de435466dcc6bfa703cb
Original-Change-Id: I86d1e69552b6000faa9e0523356e27d7e2a6a6db
Original-Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/193238
Original-Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/8770
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
This commit is contained in:
Marc Jones 2014-04-03 16:37:06 -06:00 committed by Patrick Georgi
parent fccc7dea24
commit 9bab54b6f5
1 changed files with 9 additions and 1 deletions

View File

@ -106,7 +106,15 @@ static const struct gigadevice_spi_flash_params gigadevice_spi_flash_table[] = {
.pages_per_sector = 16,
.sectors_per_block = 16,
.nr_blocks = 128,
.name = "GD25Q64(B)",
.name = "GD25Q64B/GD25B64C",
},
{
.id = 0x6017,
.l2_page_size = 8,
.pages_per_sector = 16,
.sectors_per_block = 16,
.nr_blocks = 128,
.name = "GD25LQ64C/GD25LB64C",
},
{
.id = 0x4018,