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soc/intel/alderlake: Implement `soc_is_ish_partition_enabled` override 

This patch implements `soc_is_ish_partition_enabled()` override to
uniquely identify the SKU type between UFS and non-UFS to conclude
if ISH partition is enabled and need to retrieve the ISH version from
CSE FPT by sending HECI command.

TEST=Able to uniquely identify the UFS and non-UFS SKUs while booting
to google/marasov.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I7771aebb988f11d9d1b2824aa28e6f294fd67c25
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74532
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2023-04-18 23:49:37 +05:30
parent 3879334ca0
commit 9bb2690609
1 changed files with 20 additions and 0 deletions
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20
src/soc/intel/alderlake/chip.c
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@ -162,6 +162,26 @@ const char *soc_acpi_name(const struct device *dev)
} }
#endif #endif
#if CONFIG(SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION)
/*
* SoC override API to identify if ISH Firmware existed inside CSE FPT.
*
* SoC with UFS enabled would like to keep ISH enabled as well, hence
* identifying the UFS enabled device is enough to conclude that the ISH
* partition also is available.
*/
bool soc_is_ish_partition_enabled(void)
{
struct device *ufs = pcidev_path_on_root(PCH_DEVFN_UFS);
uint16_t ufs_pci_id = ufs ? pci_read_config16(ufs, PCI_DEVICE_ID) : 0xFFFF;
if (ufs_pci_id == 0xFFFF)
return false;
return true;
}
#endif
/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */ /* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */
static void soc_fill_gpio_pm_configuration(void) static void soc_fill_gpio_pm_configuration(void)
{ {