GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/poppy/variants/nautilus: Fix memory params 

Until now, nautilus was using the DQ-DQS mappings provided by the
baseboard. However, based on schematics, these values are not
correct. This change adds DQ-DQS mapping tables for nautilus.

BUG=b:70188533

Change-Id: Ife6ba19b8fe8873ab8cca977ca8f34a4d86e8e6e
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/22706
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: shkim <sh_.kim@samsung.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Furquan Shaikh 2017-12-04 20:16:55 -08:00 committed by Furquan Shaikh
parent 94aed8d615
commit 9bfd8141fb
2 changed files with 51 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/mainboard/google/poppy/variants/nautilus/Makefile.inc
View File

@ -4,5 +4,8 @@ SPD_SOURCES += samsung_dimm_K4E6E304EB-EGCF # 0b0001
SPD_SOURCES += samsung_dimm_K4EBE304EB-EGCG # 0b0010 SPD_SOURCES += samsung_dimm_K4EBE304EB-EGCG # 0b0010
bootblock-y += gpio.c bootblock-y += gpio.c
romstage-y += memory.c
ramstage-y += gpio.c ramstage-y += gpio.c
ramstage-y += nhlt.c ramstage-y += nhlt.c

48
src/mainboard/google/poppy/variants/nautilus/memory.c Normal file
View File

@ -0,0 +1,48 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2017 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <baseboard/variants.h>
/* DQ byte map */
static const u8 dq_map[][12] = {
{ 0x0F, 0xF0, 0x00, 0xF0, 0x0F, 0xF0,
0x0F, 0x00, 0xFF, 0x00, 0xFF, 0x00 },
{ 0x33, 0xCC, 0x00, 0xCC, 0x33, 0xCC,
0x33, 0x00, 0xFF, 0x00, 0xFF, 0x00 }
};
/* DQS CPU<>DRAM map */
static const u8 dqs_map[][8] = {
{ 0, 1, 3, 2, 4, 5, 6, 7 },
{ 1, 0, 4, 5, 2, 3, 6, 7 },
};
/* Rcomp resistor */
static const u16 rcomp_resistor[] = { 200, 81, 162 };
/* Rcomp target */
static const u16 rcomp_target[] = { 100, 40, 40, 23, 40 };
void variant_memory_params(struct memory_params *p)
{
p->dq_map = dq_map;
p->dq_map_size = sizeof(dq_map);
p->dqs_map = dqs_map;
p->dqs_map_size = sizeof(dqs_map);
p->rcomp_resistor = rcomp_resistor;
p->rcomp_resistor_size = sizeof(rcomp_resistor);
p->rcomp_target = rcomp_target;
p->rcomp_target_size = sizeof(rcomp_target);
}