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lynxpoint: Move ACPI NVS into separate CBMEM table 

The ACPI NVS region was setup in place and there was a CBMEM
table that pointed to it.  In order to be able to use NVS
earlier the CBMEM region is allocated for NVS itself during
the LPC device init and the ACPI tables point to it in CBMEM.

The current cbmem region is renamed to ACPI_GNVS_PTR to
indicate that it is really a pointer to the GNVS and does
not actually contain the GNVS.

Change-Id: I31ace432411c7f825d86ca75c63dd79cd658e891
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/2970
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Duncan Laurie 2013-03-22 11:08:39 -07:00 committed by Ronald G. Minnich
parent ebf142a12c
commit 9c07c8f53d
7 changed files with 53 additions and 23 deletions
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4
src/arch/x86/boot/acpi.c
View File

@ -630,7 +630,7 @@ void suspend_resume(void)
wake_vec = acpi_find_wakeup_vector();
if (wake_vec) {
#if CONFIG_HAVE_SMI_HANDLER
u32 *gnvs_address = cbmem_find(CBMEM_ID_ACPI_GNVS);
u32 *gnvs_address = cbmem_find(CBMEM_ID_ACPI_GNVS_PTR);
/* Restore GNVS pointer in SMM if found */
if (gnvs_address && *gnvs_address) {
@ -798,7 +798,7 @@ void acpi_jump_to_wakeup(void *vector)
void acpi_save_gnvs(u32 gnvs_address)
{
u32 *gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
u32 *gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS_PTR, sizeof(*gnvs));
if (gnvs)
*gnvs = gnvs_address;
}

1
src/include/cbmem.h
View File

@ -51,6 +51,7 @@
#define CBMEM_ID_GDT 0x4c474454
#define CBMEM_ID_ACPI 0x41435049
#define CBMEM_ID_ACPI_GNVS 0x474e5653
#define CBMEM_ID_ACPI_GNVS_PTR 0x474e5650
#define CBMEM_ID_CBTABLE 0x43425442
#define CBMEM_ID_PIRQ 0x49525154
#define CBMEM_ID_MPTABLE 0x534d5054

1
src/lib/cbmem_info.c
View File

@ -33,6 +33,7 @@ static struct cbmem_id_to_name {
{ CBMEM_ID_RESUME, "ACPI RESUME" },
{ CBMEM_ID_RESUME_SCRATCH, "ACPISCRATCH" },
{ CBMEM_ID_ACPI_GNVS, "ACPI GNVS " },
{ CBMEM_ID_ACPI_GNVS_PTR, "GNVS PTR " },
{ CBMEM_ID_SMBIOS, "SMBIOS " },
{ CBMEM_ID_TIMESTAMP, "TIME STAMP " },
{ CBMEM_ID_MRCDATA, "MRC DATA " },

20
src/mainboard/intel/baskingridge/acpi_tables.c
View File

@ -70,7 +70,6 @@ static void acpi_update_thermal_table(global_nvs_t *gnvs)
static void acpi_create_gnvs(global_nvs_t *gnvs)
{
memset((void *)gnvs, 0, sizeof(*gnvs));
gnvs->apic = 1;
gnvs->mpen = 1; /* Enable Multi Processing */
gnvs->pcnt = dev_count_cpu();
@ -165,6 +164,7 @@ unsigned long write_acpi_tables(unsigned long start)
#endif
acpi_header_t *ssdt;
acpi_header_t *dsdt;
global_nvs_t *gnvs;
current = start;
@ -240,22 +240,28 @@ unsigned long write_acpi_tables(unsigned long start)
ALIGN_CURRENT;
acpi_add_table(rsdp, mcfg);
/* Pack GNVS into the ACPI table area */
/* Update GNVS pointer into CBMEM */
gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
if (!gnvs) {
printk(BIOS_DEBUG, "ACPI: Could not find CBMEM GNVS\n");
gnvs = (global_nvs_t *)current;
}
for (i=0; i < dsdt->length; i++) {
if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) {
printk(BIOS_DEBUG, "ACPI: Patching up global NVS in "
"DSDT at offset 0x%04x -> 0x%08lx\n", i, current);
*(u32*)(((u32)dsdt) + i) = current; // 0x92 bytes
acpi_save_gnvs(current);
"DSDT at offset 0x%04x -> %p\n", i, gnvs);
*(u32*)(((u32)dsdt) + i) = (unsigned long)gnvs;
acpi_save_gnvs((unsigned long)gnvs);
break;
}
}
/* And fill it */
acpi_create_gnvs((global_nvs_t *)current);
acpi_create_gnvs(gnvs);
/* And tell SMI about it */
smm_setup_structures((void *)current, NULL, NULL);
smm_setup_structures(gnvs, NULL, NULL);
current += sizeof(global_nvs_t);
ALIGN_CURRENT;

20
src/mainboard/intel/wtm1/acpi_tables.c
View File

@ -70,7 +70,6 @@ static void acpi_update_thermal_table(global_nvs_t *gnvs)
static void acpi_create_gnvs(global_nvs_t *gnvs)
{
memset((void *)gnvs, 0, sizeof(*gnvs));
gnvs->apic = 1;
gnvs->mpen = 1; /* Enable Multi Processing */
gnvs->pcnt = dev_count_cpu();
@ -162,6 +161,7 @@ unsigned long write_acpi_tables(unsigned long start)
#endif
acpi_header_t *ssdt;
acpi_header_t *dsdt;
global_nvs_t *gnvs;
current = start;
@ -237,22 +237,28 @@ unsigned long write_acpi_tables(unsigned long start)
ALIGN_CURRENT;
acpi_add_table(rsdp, mcfg);
/* Pack GNVS into the ACPI table area */
/* Update GNVS pointer into CBMEM */
gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
if (!gnvs) {
printk(BIOS_DEBUG, "ACPI: Could not find CBMEM GNVS\n");
gnvs = (global_nvs_t *)current;
}
for (i=0; i < dsdt->length; i++) {
if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) {
printk(BIOS_DEBUG, "ACPI: Patching up global NVS in "
"DSDT at offset 0x%04x -> 0x%08lx\n", i, current);
*(u32*)(((u32)dsdt) + i) = current; // 0x92 bytes
acpi_save_gnvs(current);
"DSDT at offset 0x%04x -> %p\n", i, gnvs);
*(u32*)(((u32)dsdt) + i) = (unsigned long)gnvs;
acpi_save_gnvs((unsigned long)gnvs);
break;
}
}
/* And fill it */
acpi_create_gnvs((global_nvs_t *)current);
acpi_create_gnvs(gnvs);
/* And tell SMI about it */
smm_setup_structures((void *)current, NULL, NULL);
smm_setup_structures(gnvs, NULL, NULL);
current += sizeof(global_nvs_t);
ALIGN_CURRENT;

20
src/mainboard/intel/wtm2/acpi_tables.c
View File

@ -70,7 +70,6 @@ static void acpi_update_thermal_table(global_nvs_t *gnvs)
static void acpi_create_gnvs(global_nvs_t *gnvs)
{
memset((void *)gnvs, 0, sizeof(*gnvs));
gnvs->apic = 1;
gnvs->mpen = 1; /* Enable Multi Processing */
gnvs->pcnt = dev_count_cpu();
@ -162,6 +161,7 @@ unsigned long write_acpi_tables(unsigned long start)
#endif
acpi_header_t *ssdt;
acpi_header_t *dsdt;
global_nvs_t *gnvs;
current = start;
@ -237,22 +237,28 @@ unsigned long write_acpi_tables(unsigned long start)
ALIGN_CURRENT;
acpi_add_table(rsdp, mcfg);
/* Pack GNVS into the ACPI table area */
/* Update GNVS pointer into CBMEM */
gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
if (!gnvs) {
printk(BIOS_DEBUG, "ACPI: Could not find CBMEM GNVS\n");
gnvs = (global_nvs_t *)current;
}
for (i=0; i < dsdt->length; i++) {
if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) {
printk(BIOS_DEBUG, "ACPI: Patching up global NVS in "
"DSDT at offset 0x%04x -> 0x%08lx\n", i, current);
*(u32*)(((u32)dsdt) + i) = current; // 0x92 bytes
acpi_save_gnvs(current);
"DSDT at offset 0x%04x -> %p\n", i, gnvs);
*(u32*)(((u32)dsdt) + i) = (unsigned long)gnvs;
acpi_save_gnvs((unsigned long)gnvs);
break;
}
}
/* And fill it */
acpi_create_gnvs((global_nvs_t *)current);
acpi_create_gnvs(gnvs);
/* And tell SMI about it */
smm_setup_structures((void *)current, NULL, NULL);
smm_setup_structures(gnvs, NULL, NULL);
current += sizeof(global_nvs_t);
ALIGN_CURRENT;

10
src/southbridge/intel/lynxpoint/lpc.c
View File

@ -32,6 +32,9 @@
#include <cpu/cpu.h>
#include <cpu/x86/smm.h>
#include <elog.h>
#include <cbmem.h>
#include <string.h>
#include "nvs.h"
#include "pch.h"
#define NMI_OFF 0
@ -699,6 +702,8 @@ static void pch_lpc_add_io_resources(device_t dev)
static void pch_lpc_read_resources(device_t dev)
{
global_nvs_t *gnvs;
/* Get the normal PCI resources of this device. */
pci_dev_read_resources(dev);
@ -707,6 +712,11 @@ static void pch_lpc_read_resources(device_t dev)
/* Add IO resources. */
pch_lpc_add_io_resources(dev);
/* Allocate ACPI NVS in CBMEM */
gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(global_nvs_t));
if (gnvs)
memset(gnvs, 0, sizeof(global_nvs_t));
}
static void pch_lpc_enable_resources(device_t dev)