mb/google/poppy/variants/nautilus: Enable AER and LTR for root port 1
Similar to other KBL projects, this change enables AER and LTR for root port 1 on poppy. BUG=b:65570878 Change-Id: Iadad3d2fc46cbba575a776071305925c529a6760 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/22923 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
parent
f7cd2eb55d
commit
9c12e90819
|
@ -157,6 +157,10 @@ chip soc/intel/skylake
|
|||
register "PcieRpClkReqSupport[0]" = "1"
|
||||
# RP 1 uses SRCCLKREQ1#
|
||||
register "PcieRpClkReqNumber[0]" = "1"
|
||||
# RP 1, Enable Advanced Error Reporting
|
||||
register "PcieRpAdvancedErrorReporting[0]" = "1"
|
||||
# RP 1, Enable Latency Tolerance Reporting Mechanism
|
||||
register "PcieRpLtrEnable[0]" = "1"
|
||||
|
||||
register "usb2_ports[0]" = "USB2_PORT_LONG(OC0)" # Type-C Port 1
|
||||
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port
|
||||
|
|
Loading…
Reference in New Issue