soc/intel/braswell: Hide some Kconfig options in menuconfig
Don't allow the user to set PCIe configspace base address. Don't allow the user to set the DCACHE size and base. Change-Id: I7a42cc5f6098214364624bcfa3cbd93b4903ee84 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/20181 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
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@ -55,7 +55,7 @@ config BOOTBLOCK_CPU_INIT
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default "soc/intel/braswell/bootblock/bootblock.c"
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config MMCONF_BASE_ADDRESS
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hex "PCIe CFG Base Address"
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hex
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default 0xe0000000
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config MAX_CPUS
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@ -88,11 +88,11 @@ config SMM_RESERVED_SIZE
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#
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config DCACHE_RAM_BASE
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hex "Temporary RAM Base Address"
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hex
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default 0xfef00000
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config DCACHE_RAM_SIZE
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hex "Temporary RAM Size"
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hex
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default 0x4000
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help
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The size of the cache-as-ram region required during bootblock
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