From 9c2d8135fe7bcff50462f8aa216b34ff2793aa59 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= <foss@mniewoehner.de>
Date: Wed, 18 May 2022 22:24:17 +0200
Subject: [PATCH] soc/intel/common/acpi: provide PTS/WAK hooks for ECs
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Provide PTS/WAK hooks for ECs like we do for mainboards.

Change-Id: I687254362a896baa590959bd01ae49579ec12c94
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68788
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/intel/common/acpi/platform.asl | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/src/soc/intel/common/acpi/platform.asl b/src/soc/intel/common/acpi/platform.asl
index c988e0a43f..6a19792bf4 100644
--- a/src/soc/intel/common/acpi/platform.asl
+++ b/src/soc/intel/common/acpi/platform.asl
@@ -6,6 +6,8 @@ External(\_SB.MPTS, MethodObj)
 External(\_SB.MWAK, MethodObj)
 External(\_SB.PCI0.EGPM, MethodObj)
 External(\_SB.PCI0.RGPM, MethodObj)
+External(\_SB.PCI0.LPCB.EC0.PTS, MethodObj)
+External(\_SB.PCI0.LPCB.EC0.WAK, MethodObj)
 
 #include <arch/x86/acpi/post.asl>
 
@@ -18,6 +20,10 @@ Method (_PTS, 1)
 {
 	DBG0 = POST_OS_ENTER_PTS
 
+	If (CondRefOf (\_SB.PCI0.LPCB.EC0.PTS))
+	{
+		\_SB.PCI0.LPCB.EC0.PTS (Arg0)
+	}
 	If (CondRefOf (\_SB.MPTS))
 	{
 		\_SB.MPTS (Arg0)
@@ -38,6 +44,10 @@ Method (_WAK, 1)
 {
 	DBG0 = POST_OS_ENTER_WAKE
 
+	If (CondRefOf (\_SB.PCI0.LPCB.EC0.WAK))
+	{
+		\_SB.PCI0.LPCB.EC0.WAK (Arg0)
+	}
 	If (CondRefOf (\_SB.MWAK))
 	{
 		\_SB.MWAK (Arg0)