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soc/amd/picasso: Set HAVE_BOOTBLOCK=n 

Change-Id: Iaf370e04adb04eb81555a57e81812ebe3339971d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34478
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Kyösti Mälkki 2019-07-22 09:34:50 +03:00 committed by Marshall Dawson
parent a3cb61a55d
commit 9c55ee34ac
4 changed files with 4 additions and 46 deletions
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4
src/soc/amd/picasso/Kconfig
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@ -72,6 +72,10 @@ config UDELAY_LAPIC_FIXED_FSB
int
default 200
config HAVE_BOOTBLOCK
bool
default n
# TODO: Sync these with definitions in PI vendorcode.
# DCACHE_RAM_BASE must equal BSP_STACK_BASE_ADDR.
# DCACHE_RAM_SIZE must equal BSP_STACK_SIZE.

7
src/soc/amd/picasso/Makefile.inc
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@ -37,13 +37,6 @@ subdirs-y += ../../../cpu/x86/mtrr
subdirs-y += ../../../cpu/x86/pae
subdirs-y += ../../../cpu/x86/smm
# TODO: Make coreboot modifications so bootblock can be removed. This soc
# also selects C_ENVIRONMENT_BOOTBLOCK to enforce certain codepaths
# in romstage. As a result, the bootblock build also needs a
# dummy cache_as_ram.S
bootblock-y += cache_as_ram.S
bootblock-y += bootblock/bootblock.c
romstage-y += i2c.c
romstage-y += romstage.c
romstage-y += gpio.c

19
src/soc/amd/picasso/bootblock/bootblock.c
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@ -1,19 +0,0 @@
/*
* This file is part of the coreboot project.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <bootblock_common.h>
asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
{
/* This function is here for building/linking only */
}

20
src/soc/amd/picasso/cache_as_ram.S
View File

@ -1,20 +0,0 @@
/*
* This file is part of the coreboot project.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/*
* TODO: This is a dummy file for making bootblock build and link. At some
* point, this should be removed from picasso since bootblock is
* ignored.
*/
.global bootblock_pre_c_entry
bootblock_pre_c_entry: