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cpu/amd (non-AGESA): Fix AP crash during microcode version lookup 

Move mapping tables to struct and prevent OOB array
access that was crashing the APs during CAR initialization.

Change-Id: I9e2554b50ad60a8d02ef4bd3fbee6fddb238d83f
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8310
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@gmail.com>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Timothy Pearson 2015-01-30 23:47:45 -06:00 committed by Alexandru Gagniuc
parent 0d7f8d0b79
commit 9c8106696e
2 changed files with 60 additions and 42 deletions
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47
src/cpu/amd/model_10xxx/update_microcode.c
View File

@ -1,6 +1,7 @@
/* /*
* This file is part of the coreboot project. * This file is part of the coreboot project.
* *
* Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
* Copyright (C) 2007 Advanced Micro Devices, Inc. * Copyright (C) 2007 Advanced Micro Devices, Inc.
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
@ -56,22 +57,30 @@ static const u8 microcode_updates[] __attribute__ ((aligned(16))) = {
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
}; };
static u32 get_equivalent_processor_rev_id(u32 orig_id) { struct id_mapping {
static unsigned id_mapping_table[] = { uint32_t orig_id;
0x100f00, 0x1000, uint16_t new_id;
0x100f01, 0x1000, };
0x100f02, 0x1000,
0x100f20, 0x1020, static u16 get_equivalent_processor_rev_id(u32 orig_id) {
0x100f21, 0x1020, static const struct id_mapping id_mapping_table[] = {
0x100f2A, 0x1020, { 0x100f00, 0x1000 },
0x100f22, 0x1022, { 0x100f01, 0x1000 },
0x100f23, 0x1022, { 0x100f02, 0x1000 },
0x100f42, 0x1041, { 0x100f20, 0x1020 },
0x100f43, 0x1043, { 0x100f21, 0x1020 },
0x100f62, 0x1062, { 0x100f2A, 0x1020 },
0x100f63, 0x1043, { 0x100f22, 0x1022 },
0x100f81, 0x1081, { 0x100f23, 0x1022 },
0x100fa0, 0x10A0, { 0x100f42, 0x1041 },
{ 0x100f43, 0x1043 },
{ 0x100f62, 0x1062 },
{ 0x100f63, 0x1043 },
{ 0x100f81, 0x1081 },
{ 0x100fa0, 0x10A0 },
/* Array terminator */
{ 0xffffff, 0x0000 },
}; };
u32 new_id; u32 new_id;
@ -79,9 +88,9 @@ static u32 get_equivalent_processor_rev_id(u32 orig_id) {
new_id = 0; new_id = 0;
for (i = 0; i < sizeof(id_mapping_table); i += 2 ) { for (i = 0; id_mapping_table[i].orig_id != 0xffffff; i++ ) {
if(id_mapping_table[i]==orig_id) { if (id_mapping_table[i].orig_id == orig_id) {
new_id = id_mapping_table[i + 1]; new_id = id_mapping_table[i].new_id;
break; break;
} }
} }

55
src/cpu/amd/model_fxx/model_fxx_update_microcode.c
View File

@ -3,6 +3,7 @@
* *
* Copyright (C) 2005 Advanced Micro Devices, Inc. * Copyright (C) 2005 Advanced Micro Devices, Inc.
* Copyright (C) 2010 Advanced Micro Devices, Inc. * Copyright (C) 2010 Advanced Micro Devices, Inc.
* Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@ -40,35 +41,43 @@ static uint8_t microcode_updates[] __attribute__ ((aligned(16))) = {
0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
}; };
static unsigned get_equivalent_processor_rev_id(unsigned orig_id) { struct id_mapping {
static unsigned id_mapping_table[] = { uint32_t orig_id;
uint16_t new_id;
};
static u16 get_equivalent_processor_rev_id(u32 orig_id) {
static const struct id_mapping id_mapping_table[] = {
#if !CONFIG_K8_REV_F_SUPPORT #if !CONFIG_K8_REV_F_SUPPORT
0x0f48, 0x0048, { 0x0f48, 0x0048 },
0x0f58, 0x0048, { 0x0f58, 0x0048 },
0x0f4a, 0x004a, { 0x0f4a, 0x004a },
0x0f5a, 0x004a, { 0x0f5a, 0x004a },
0x0f7a, 0x004a, { 0x0f7a, 0x004a },
0x0f82, 0x004a, { 0x0f82, 0x004a },
0x0fc0, 0x004a, { 0x0fc0, 0x004a },
0x0ff0, 0x004a, { 0x0ff0, 0x004a },
0x10f50, 0x0150, { 0x10f50, 0x0150 },
0x10f70, 0x0150, { 0x10f70, 0x0150 },
0x10f80, 0x0150, { 0x10f80, 0x0150 },
0x10fc0, 0x0150, { 0x10fc0, 0x0150 },
0x10ff0, 0x0150, { 0x10ff0, 0x0150 },
0x20f10, 0x0210, { 0x20f10, 0x0210 },
0x20f12, 0x0210, { 0x20f12, 0x0210 },
0x20f32, 0x0210, { 0x20f32, 0x0210 },
0x20fb1, 0x0210, { 0x20fb1, 0x0210 },
#endif #endif
#if CONFIG_K8_REV_F_SUPPORT #if CONFIG_K8_REV_F_SUPPORT
/* FIXME */
#endif #endif
/* Array terminator */
{ 0xffffff, 0x0000 },
}; };
unsigned new_id; unsigned new_id;
@ -76,9 +85,9 @@ static unsigned get_equivalent_processor_rev_id(unsigned orig_id) {
new_id = 0; new_id = 0;
for(i=0; i<sizeof(id_mapping_table); i+=2 ) { for (i = 0; id_mapping_table[i].orig_id != 0xffffff; i++ ) {
if(id_mapping_table[i]==orig_id) { if (id_mapping_table[i].orig_id == orig_id) {
new_id = id_mapping_table[i+1]; new_id = id_mapping_table[i].new_id;
break; break;
} }
} }