diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index b447d52dab..fb0b4cbc6e 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -511,6 +511,6 @@ static void enable_dev(device_t dev)
 }
 
 struct chip_operations northbridge_intel_sandybridge_ops = {
-	CHIP_NAME("Intel i7 (Sandybridge) integrated Northbridge")
+	CHIP_NAME("Intel i7 (SandyBridge/IvyBridge) integrated Northbridge")
 	.enable_dev = enable_dev,
 };
diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig
index 33dfe9d755..a7d41dcb84 100644
--- a/src/southbridge/intel/bd82x6x/Kconfig
+++ b/src/southbridge/intel/bd82x6x/Kconfig
@@ -56,15 +56,3 @@ config SERIRQ_CONTINUOUS_MODE
 	  operated in continuous mode.
 
 endif
-
-if SOUTHBRIDGE_INTEL_BD82X6X
-config PCH_CHIP_NAME
-	string
-	default "Cougar Point"
-endif
-
-if SOUTHBRIDGE_INTEL_C216
-config PCH_CHIP_NAME
-	string
-	default "Panther Point"
-endif
diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c
index 3c448defd4..d8a919dc9d 100644
--- a/src/southbridge/intel/bd82x6x/pch.c
+++ b/src/southbridge/intel/bd82x6x/pch.c
@@ -405,6 +405,6 @@ void pch_enable(device_t dev)
 }
 
 struct chip_operations southbridge_intel_bd82x6x_ops = {
-	CHIP_NAME("Intel Series 6/7 (" CONFIG_PCH_CHIP_NAME ") Southbridge")
+	CHIP_NAME("Intel Series 6/7 (Cougar Point/Panther Point) Southbridge")
 	.enable_dev = pch_enable,
 };