Add Intel 3100 integrated northbridge/southbridge/superio PCI IDs.
Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3024 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -2326,6 +2326,17 @@
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#define PCI_DEVICE_ID_INTEL_6300ESB_PCI_X 0x25ae
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#define PCI_DEVICE_ID_INTEL_6300ESB_PCI_X 0x25ae
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#define PCI_DEVICE_ID_INTEL_6300ESB_WDT 0x25ab
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#define PCI_DEVICE_ID_INTEL_6300ESB_WDT 0x25ab
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/* Intel 3100 */
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#define PCI_DEVICE_ID_INTEL_3100_ISA 0x2670
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#define PCI_DEVICE_ID_INTEL_3100_EHCI 0x268c
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#define PCI_DEVICE_ID_INTEL_3100_PCI 0x244e
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#define PCI_DEVICE_ID_INTEL_3100_USB 0x2688
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#define PCI_DEVICE_ID_INTEL_3100_SMB 0x269b
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#define PCI_DEVICE_ID_INTEL_3100_USB2 0x2689
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#define PCI_DEVICE_ID_INTEL_3100_USB3 0x268c
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#define PCI_DEVICE_ID_INTEL_3100_SATA 0x2680
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#define PCI_DEVICE_ID_INTEL_3100_SATA_R 0x2681
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#define PCI_DEVICE_ID_INTEL_80310 0x530d
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#define PCI_DEVICE_ID_INTEL_80310 0x530d
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#define PCI_DEVICE_ID_INTEL_82810_MC1 0x7120
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#define PCI_DEVICE_ID_INTEL_82810_MC1 0x7120
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#define PCI_DEVICE_ID_INTEL_82810_IG1 0x7121
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#define PCI_DEVICE_ID_INTEL_82810_IG1 0x7121
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#define PCI_DEVICE_ID_INTEL_PCIE_PA1 0x3596
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#define PCI_DEVICE_ID_INTEL_PCIE_PA1 0x3596
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#define PCI_DEVICE_ID_INTEL_PCIE_PB 0x3597
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#define PCI_DEVICE_ID_INTEL_PCIE_PB 0x3597
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#define PCI_DEVICE_ID_INTEL_PCIE_PC 0x3599
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#define PCI_DEVICE_ID_INTEL_PCIE_PC 0x3599
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#define PCI_DEVICE_ID_INTEL_PCIE_QA 0x35b6
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#define PCI_DEVICE_ID_INTEL_PCIE_QA1 0x35b7
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#define PCI_VENDOR_ID_COMPUTONE 0x8e0e
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#define PCI_VENDOR_ID_COMPUTONE 0x8e0e
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#define PCI_DEVICE_ID_COMPUTONE_IP2EX 0x0291
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#define PCI_DEVICE_ID_COMPUTONE_IP2EX 0x0291
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