soc/amd(MDN/PHX/Glinda): Update DISABLE_KEYBOARD_RESET_PIN help
For MDN, PHX, & Glinda platforms, the Keyboard Reset functionality has been moved from GPIO 129 to GPIO 21. Additionally, the issue where the system would reset when the KBDRST_L pin went low even when not configured for Keyboard reset seems to have been fixed, so remove that text. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: Iefe7e00d63777577b59ee98cb974b07afea1fd12 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72912 Reviewed-by: Jon Murphy <jpmurphy@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
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@ -296,10 +296,7 @@ config DISABLE_SPI_FLASH_ROM_SHARING
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config DISABLE_KEYBOARD_RESET_PIN
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bool
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help
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Instruct the SoC to not use the state of GPIO_129 as keyboard reset
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signal. When this pin is used as GPIO and the keyboard reset
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functionality isn't disabled, configuring it as an output and driving
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it as 0 will cause a reset.
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Instruct the SoC to not to reset based on the state of GPIO_21, KBDRST_L.
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config ACPI_SSDT_PSD_INDEPENDENT
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bool "Allow core p-state independent transitions"
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@ -310,10 +310,7 @@ config DISABLE_SPI_FLASH_ROM_SHARING
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config DISABLE_KEYBOARD_RESET_PIN
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bool
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help
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Instruct the SoC to not use the state of GPIO_129 as keyboard reset
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signal. When this pin is used as GPIO and the keyboard reset
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functionality isn't disabled, configuring it as an output and driving
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it as 0 will cause a reset.
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Instruct the SoC to not to reset based on the state of GPIO_21, KBDRST_L.
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config ACPI_SSDT_PSD_INDEPENDENT
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bool "Allow core p-state independent transitions"
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@ -295,10 +295,7 @@ config DISABLE_SPI_FLASH_ROM_SHARING
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config DISABLE_KEYBOARD_RESET_PIN
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bool
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help
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Instruct the SoC to not use the state of GPIO_129 as keyboard reset
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signal. When this pin is used as GPIO and the keyboard reset
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functionality isn't disabled, configuring it as an output and driving
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it as 0 will cause a reset.
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Instruct the SoC to not to reset based on the state of GPIO_21, KBDRST_L.
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config ACPI_SSDT_PSD_INDEPENDENT
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bool "Allow core p-state independent transitions"
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