soc/amd(MDN/PHX/Glinda): Update DISABLE_KEYBOARD_RESET_PIN help

For MDN, PHX, & Glinda platforms, the Keyboard Reset functionality has
been moved from GPIO 129 to GPIO 21.

Additionally, the issue where the system would reset when the KBDRST_L
pin went low even when not configured for Keyboard reset seems to have
been fixed, so remove that text.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Iefe7e00d63777577b59ee98cb974b07afea1fd12
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72912
Reviewed-by: Jon Murphy <jpmurphy@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Martin Roth 2023-02-08 14:26:02 -07:00 committed by Felix Held
parent e5e8286262
commit 9ceac74a51
3 changed files with 3 additions and 12 deletions

View File

@ -296,10 +296,7 @@ config DISABLE_SPI_FLASH_ROM_SHARING
config DISABLE_KEYBOARD_RESET_PIN
bool
help
Instruct the SoC to not use the state of GPIO_129 as keyboard reset
signal. When this pin is used as GPIO and the keyboard reset
functionality isn't disabled, configuring it as an output and driving
it as 0 will cause a reset.
Instruct the SoC to not to reset based on the state of GPIO_21, KBDRST_L.
config ACPI_SSDT_PSD_INDEPENDENT
bool "Allow core p-state independent transitions"

View File

@ -310,10 +310,7 @@ config DISABLE_SPI_FLASH_ROM_SHARING
config DISABLE_KEYBOARD_RESET_PIN
bool
help
Instruct the SoC to not use the state of GPIO_129 as keyboard reset
signal. When this pin is used as GPIO and the keyboard reset
functionality isn't disabled, configuring it as an output and driving
it as 0 will cause a reset.
Instruct the SoC to not to reset based on the state of GPIO_21, KBDRST_L.
config ACPI_SSDT_PSD_INDEPENDENT
bool "Allow core p-state independent transitions"

View File

@ -295,10 +295,7 @@ config DISABLE_SPI_FLASH_ROM_SHARING
config DISABLE_KEYBOARD_RESET_PIN
bool
help
Instruct the SoC to not use the state of GPIO_129 as keyboard reset
signal. When this pin is used as GPIO and the keyboard reset
functionality isn't disabled, configuring it as an output and driving
it as 0 will cause a reset.
Instruct the SoC to not to reset based on the state of GPIO_21, KBDRST_L.
config ACPI_SSDT_PSD_INDEPENDENT
bool "Allow core p-state independent transitions"