fix for qemu northbridge, from Ed Swierk
Signed-off-by: Ronald G. Minnich git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2405 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -67,16 +67,40 @@ static uint32_t find_pci_tolm(struct bus *bus)
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static void pci_domain_set_resources(device_t dev)
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{
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static const uint8_t ramregs[] = {
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0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f, 0x56, 0x57
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};
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device_t mc_dev;
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uint32_t pci_tolm;
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uint32_t idx;
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pci_tolm = find_pci_tolm(&dev->link[0]);
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mc_dev = dev->link[0].children;
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if (mc_dev) {
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unsigned long tomk, tolmk;
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/* Hard code the Top of memory for now */
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tomk = 65536;
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unsigned char rambits;
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int i, idx;
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for(rambits = 0, i = 0; i < sizeof(ramregs)/sizeof(ramregs[0]); i++) {
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unsigned char reg;
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reg = pci_read_config8(mc_dev, ramregs[i]);
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/* these are ENDING addresses, not sizes.
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* if there is memory in this slot, then reg will be > rambits.
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* So we just take the max, that gives us total.
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* We take the highest one to cover for once and future linuxbios
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* bugs. We warn about bugs.
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*/
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if (reg > rambits)
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rambits = reg;
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if (reg < rambits)
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printk_err("ERROR! register 0x%x is not set!\n",
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ramregs[i]);
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}
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if (rambits == 0) {
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printk_err("RAM size config registers are empty; defaulting to 64 MBytes\n");
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rambits = 8;
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}
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printk_debug("I would set ram size to 0x%x Kbytes\n", (rambits)*8*1024);
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tomk = rambits*8*1024;
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/* Compute the top of Low memory */
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tolmk = pci_tolm >> 10;
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if (tolmk >= tomk) {
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@ -84,14 +108,9 @@ static void pci_domain_set_resources(device_t dev)
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*/
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tolmk = tomk;
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}
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/* Report the memory regions */
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idx = 10;
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ram_resource(dev, idx++, 0, 640);
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ram_resource(dev, idx++, 768, tolmk - 768);
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if (tomk > 4*1024*1024) {
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ram_resource(dev, idx++, 4096*1024, tomk - 4*1024*1024);
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}
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ram_resource(dev, idx++, 0, tolmk);
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}
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assign_resources(&dev->link[0]);
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}
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