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kahlee/ec.c: Use new wide IO function 

In preparation to deleting early_setup,c, change early_ec_init() to use new
southbridge.c function sb_set_wideio_range and remove <#ifdef __PRE_RAM__>.

BUG=b:64033893
TEST=Build, boot and check serial output, search for "Covered by wideIO xx",
which should match earlier message "Range assigned to wide IO xx" generated
within modified early_ec_init().

Change-Id: Iaea17f4f636aab6bd8b05b1b3bed53a677164e74
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/22591
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Richard Spiegel 2017-11-24 07:56:33 -07:00 committed by Martin Roth
parent b5f9645927
commit 9d0aa99c5e
1 changed files with 6 additions and 3 deletions
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9
src/mainboard/google/kahlee/ec.c
View File

@ -36,9 +36,9 @@ static void ramstage_ec_init(void)
static void early_ec_init(void) static void early_ec_init(void)
{ {
#ifdef __PRE_RAM__
uint16_t ec_ioport_base; uint16_t ec_ioport_base;
size_t ec_ioport_size; size_t ec_ioport_size;
int status;
/* /*
* Set up LPC decoding for the ChromeEC I/O port ranges: * Set up LPC decoding for the ChromeEC I/O port ranges:
@ -50,8 +50,11 @@ static void early_ec_init(void)
printk(BIOS_DEBUG, printk(BIOS_DEBUG,
"LPC Setup google_chromeec_ioport_range: %04x, %08zx\n", "LPC Setup google_chromeec_ioport_range: %04x, %08zx\n",
ec_ioport_base, ec_ioport_size); ec_ioport_base, ec_ioport_size);
lpc_wideio_512_window(ec_ioport_base); status = sb_set_wideio_range(ec_ioport_base, ec_ioport_size);
#endif //_PRE_RAM_ if (status == WIDEIO_RANGE_ERROR)
printk(BIOS_WARNING, "ERROR: Failed to assign a range\n");
else
printk(BIOS_DEBUG, "Range assigned to wide IO %d\n", status);
} }
void mainboard_ec_init(void) void mainboard_ec_init(void)