sc7180: clock: Define the UART frequency for QUPV3

The frequency to be used by UART client is 7.3728MHz, thus define it in
the clock header to be used by the driver.

Tested: UART frequency request by client driver.

Change-Id: I1ced350fe9826ea05b03ffc11aced2c21fe85c9e
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40329
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
Taniya Das 2020-04-03 21:37:27 +05:30 committed by Julius Werner
parent ef5ff0b49a
commit 9d25207aaf
2 changed files with 2 additions and 1 deletions

View File

@ -22,7 +22,7 @@
struct clock_config qup_cfg[] = { struct clock_config qup_cfg[] = {
{ {
.hz = 7372800, .hz = QUPV3_UART_SRC_HZ,
.src = SRC_GPLL0_EVEN_300MHZ, .src = SRC_GPLL0_EVEN_300MHZ,
.div = DIV(1), .div = DIV(1),
.m = 384, .m = 384,

View File

@ -32,6 +32,7 @@
#define SRC_XO_HZ (19200 * KHz) #define SRC_XO_HZ (19200 * KHz)
#define GPLL0_EVEN_HZ (300 * MHz) #define GPLL0_EVEN_HZ (300 * MHz)
#define GPLL0_MAIN_HZ (600 * MHz) #define GPLL0_MAIN_HZ (600 * MHz)
#define QUPV3_UART_SRC_HZ 7372800
#define SRC_XO_19_2MHZ 0 #define SRC_XO_19_2MHZ 0
#define SRC_GPLL0_MAIN_600MHZ 1 #define SRC_GPLL0_MAIN_600MHZ 1