mb/siemens/mc_apl1: Move POST logic to mainboard level

Move logic previously used only in the mc_apl2 variant to
the mainboard level so that other variants can also make
use of it without code duplication.

This functionality on the mc_apl6 variant will be enabled
in a follow-up patch.

BUG=none
TEST=Boot on siemens/mc_apl2 and observe that the POST
codes are displayed before DRAM training.

Change-Id: I762e328ad06c047d911ce1fc40f12a66cbd14e11
Signed-off-by: Jan Samek <jan.samek@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72115
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>

src/mainboard/siemens/mc_apl1/Makefile.inc

@@ -7,6 +7,8 @@ romstage-y += romstage.c
 
 ramstage-y += mainboard.c
 
+all-$(CONFIG_NC_FPGA_POST_CODE) += post.c
+
 subdirs-y += variants/baseboard
 CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include
 

src/mainboard/siemens/mc_apl1/variants/mc_apl2/Makefile.inc

@@ -2,5 +2,3 @@ bootblock-y += gpio.c
 
 ramstage-y += gpio.c
 ramstage-y += mainboard.c
-
-all-$(CONFIG_NC_FPGA_POST_CODE) += post.c