soc/amd/stoneyridge: Fix device IDs
Update pci_devs.h to the correct IDs for Stoney Ridge. BUG=chrome-os-partner:62578372 Change-Id: Ic1a7fe8d95c34b80e21cc089168732372d9690a3 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/20200 Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
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@ -21,7 +21,7 @@
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/* XHCI */
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#define XHCI_DEV 0x10
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#define XHCI_FUNC 0
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#define XHCI_DEVID 0x7814
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#define XHCI_DEVID 0x7914
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#define XHCI_DEVFN PCI_DEVFN(XHCI_DEV, XHCI_FUNC)
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#define XHCI2_DEV 0x10
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@ -32,9 +32,9 @@
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/* SATA */
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#define SATA_DEV 0x11
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#define SATA_FUNC 0
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#define SATA_IDE_DEVID 0x7800
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#define AHCI_DEVID_MS 0x7801
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#define AHCI_DEVID_AMD 0x7804
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#define SATA_IDE_DEVID 0x7900
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#define AHCI_DEVID_MS 0x7901
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#define AHCI_DEVID_AMD 0x7904
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#define SATA_DEVFN PCI_DEVFN(SATA_DEV, SATA_FUNC)
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/* OHCI */
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@ -53,13 +53,13 @@
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#define OHCI4_DEVFN PCI_DEVFN(OHCI4_DEV, OHCI4_FUNC)
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/* EHCI */
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#define EHCI1_DEV 0x12
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#define EHCI1_FUNC 2
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#define EHCI_DEV 0x12
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#define EHCI_FUNC 0
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#define EHCI2_DEV 0x13
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#define EHCI2_FUNC 2
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#define EHCI3_DEV 0x16
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#define EHCI3_FUNC 2
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#define EHCI_DEVID 0x7808
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#define EHCI_DEVID 0x7908
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#define EHCI1_DEVFN PCI_DEVFN(EHCI1_DEV, EHCI1_FUNC)
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#define EHCI2_DEVFN PCI_DEVFN(EHCI2_DEV, EHCI2_FUNC)
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#define EHCI3_DEVFN PCI_DEVFN(EHCI3_DEV, EHCI3_FUNC)
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@ -67,7 +67,7 @@
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/* SMBUS */
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#define SMBUS_DEV 0x14
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#define SMBUS_FUNC 0
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#define SMBUS_DEVID 0x780b
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#define SMBUS_DEVID 0x790b
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#define SMBUS_DEVFN PCI_DEVFN(SMBUS_DEV, SMBUS_FUNC)
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/* IDE */
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@ -87,13 +87,13 @@
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/* LPC BUS */
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#define PCU_DEV 0x14
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#define LPC_FUNC 3
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#define LPC_DEVID 0x780e
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#define LPC_DEVFN PCI_DEVFN(LPC_DEV, LPC_FUNC)
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#define LPC_DEVID 0x790e
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#define LPC_DEVFN PCI_DEVFN(PCU_DEV, LPC_FUNC)
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/* SD Controller */
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#define SD_DEV 0x14
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#define SD_FUNC 7
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#define SD_DEVID 0x7806
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#define SD_DEVID 0x7906
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#define SD_DEVFN PCI_DEVFN(SD_DEV, SD_FUNC)
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/* PCIe Ports */
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