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PCH: Add register descriptions used by IGD OpRegion 

These bits are used by the IGD OpRegion code

Change-Id: I89a11fc5021d51e0c1675ba56f6a3bc3b79bb8aa
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1751
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
This commit is contained in:
Stefan Reinauer 2012-09-19 10:49:12 -07:00 committed by Stefan Reinauer
parent 0acdcf614c
commit 9d81c19a88
1 changed files with 2 additions and 0 deletions
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2
src/southbridge/intel/bd82x6x/pch.h
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@ -472,6 +472,7 @@ int smbus_read_byte(unsigned device, unsigned address);
#define GPE0_EN 0x28 #define GPE0_EN 0x28
#define PME_B0_EN (1 << 13) #define PME_B0_EN (1 << 13)
#define PME_EN (1 << 11) #define PME_EN (1 << 11)
#define TCOSCI_EN (1 << 6)
#define SMI_EN 0x30 #define SMI_EN 0x30
#define INTEL_USB2_EN (1 << 18) // Intel-Specific USB2 SMI logic #define INTEL_USB2_EN (1 << 18) // Intel-Specific USB2 SMI logic
#define LEGACY_USB2_EN (1 << 17) // Legacy USB2 SMI logic #define LEGACY_USB2_EN (1 << 17) // Legacy USB2 SMI logic
@ -494,6 +495,7 @@ int smbus_read_byte(unsigned device, unsigned address);
#define SS_CNT 0x50 #define SS_CNT 0x50
#define C3_RES 0x54 #define C3_RES 0x54
#define TCO1_STS 0x64 #define TCO1_STS 0x64
#define DMISCI_STS (1 << 9)
#define TCO2_STS 0x66 #define TCO2_STS 0x66
/* /*