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mb/google/rex/var/ovis: Enable LAN1 

This patch performs below operations to enable LAN1.
  - Add overridetree.cb entry to configure the LAN device.
  - Complete the LAN1/SD PEREST power sequencing

BUG=b:289395519
TEST=Able to boot google/ovis with LAN1 being enabled.

Change-Id: Ifb67cb8e6fc03e3ff14b1b3d8382322fd0b3aeff
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76212
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2023-06-30 22:32:17 -07:00
parent ad7ead7cbf
commit 9d8baea15c
2 changed files with 13 additions and 1 deletions
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5
src/mainboard/google/rex/variants/ovis/gpio.c
View File

@ -400,13 +400,16 @@ static const struct pad_config early_gpio_table[] = {
/* GPP_H10 : [] ==> SOC_WP_OD */ /* GPP_H10 : [] ==> SOC_WP_OD */
PAD_CFG_GPI_GPIO_DRIVER_LOCK(GPP_H10, NONE, LOCK_CONFIG), PAD_CFG_GPI_GPIO_DRIVER_LOCK(GPP_H10, NONE, LOCK_CONFIG),
/* GPP_D02 : [] ==> SD_PERST_L */
PAD_CFG_GPO(GPP_D02, 0, DEEP),
}; };
static const struct pad_config romstage_gpio_table[] = { static const struct pad_config romstage_gpio_table[] = {
/* A20 : [] ==> SSD_PERST_L */ /* A20 : [] ==> SSD_PERST_L */
PAD_CFG_GPO(GPP_A20, 0, DEEP), PAD_CFG_GPO(GPP_A20, 0, DEEP),
/* GPP_D02 : [] ==> SD_PERST_L */ /* GPP_D02 : [] ==> SD_PERST_L */
PAD_CFG_GPO(GPP_D02, 1, DEEP), PAD_CFG_GPO(GPP_D02, 0, DEEP),
}; };
const struct pad_config *variant_gpio_table(size_t *num) const struct pad_config *variant_gpio_table(size_t *num)

9
src/mainboard/google/rex/variants/ovis/overridetree.cb
View File

@ -55,6 +55,15 @@ chip soc/intel/meteorlake
device generic 0 alias dptf_policy on end device generic 0 alias dptf_policy on end
end end
end end
device ref pcie_rp7 on
# Enable LAN1 Card PCIE 7 using clk 2
register "pcie_rp[PCH_RP(7)]" = "{
.clk_src = 2,
.clk_req = 2,
.flags = PCIE_RP_LTR | PCIE_RP_AER,
}"
end #PCIE7 LAN1 card
device ref pcie_rp11 on device ref pcie_rp11 on
# Enable SSD Card PCIE 11 using clk 7 # Enable SSD Card PCIE 11 using clk 7
register "pcie_rp[PCH_RP(11)]" = "{ register "pcie_rp[PCH_RP(11)]" = "{