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trival. All the changes is about comment and spaces. 

In superio folder.

1. Delete trailing white spaces.
2. Change the // comment to /* */.
3. Add some copyright header.
4. reindent.
5. delete multi blank lines.

I tried my best to find them. If anything left, please fix it
or tell me.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Zheng Bao <zheng.bao@amd.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4993 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Zheng Bao 2009-12-28 09:59:44 +00:00 committed by Zheng Bao
parent 0f0aa15e7e
commit 9db833bec3
178 changed files with 2596 additions and 893 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/superio/fintek/f71805f/Config.lb
View File

@ -20,4 +20,3 @@
config chip.h
object superio.o

1
src/superio/fintek/f71805f/Makefile.inc
View File

@ -20,4 +20,3 @@
#config chip.h
obj-$(CONFIG_SUPERIO_FINTEK_F71805F) += superio.o

2
src/superio/fintek/f71805f/f71805f.h
View File

@ -24,7 +24,7 @@
* - URL: http://www.fintek.com.tw/eng/products.asp?BID=1&SID=17
* - PDF: http://www.fintek.com.tw/files/productfiles/F71805F_V025.pdf
* - Revision: V0.25P
*/
*/
/* Logical Device Numbers (LDN). */
#define F71805F_FDC 0x00 /* Floppy */

7
src/superio/fintek/f71805f/superio.c
View File

@ -29,12 +29,12 @@
#include "chip.h"
#include "f71805f.h"
static void pnp_enter_conf_state(device_t dev)
static void pnp_enter_conf_state(device_t dev)
{
outb(0x87, dev->path.pnp.port);
}
static void pnp_exit_conf_state(device_t dev)
static void pnp_exit_conf_state(device_t dev)
{
outb(0xaa, dev->path.pnp.port);
}
@ -46,7 +46,7 @@ static void f71805f_init(device_t dev)
if (!dev->enabled)
return;
switch(dev->path.pnp.device) {
/* TODO: Might potentially need code for HWM or FDC etc. */
case F71805F_SP1:
@ -110,4 +110,3 @@ struct chip_operations superio_fintek_f71805f_ops = {
CHIP_NAME("Fintek F71805F Super I/O")
.enable_dev = enable_dev
};

1
src/superio/intel/i3100/Config.lb
View File

@ -20,4 +20,3 @@
config chip.h
object superio.o

1
src/superio/intel/i3100/Makefile.inc
View File

@ -20,4 +20,3 @@
#config chip.h
obj-$(CONFIG_SUPERIO_INTEL_I3100) += superio.o

1
src/superio/intel/i3100/superio.c
View File

@ -105,4 +105,3 @@ struct chip_operations superio_intel_i3100_ops = {
CHIP_NAME("Intel 3100 Super I/O")
.enable_dev = enable_dev,
};

1
src/superio/ite/it8661f/Config.lb
View File

@ -20,4 +20,3 @@
config chip.h
object superio.o

1
src/superio/ite/it8661f/Makefile.inc
View File

@ -20,4 +20,3 @@
#config chip.h
obj-$(CONFIG_SUPERIO_ITE_IT8661F) += superio.o

1
src/superio/ite/it8661f/chip.h
View File

@ -33,4 +33,3 @@ struct superio_ite_it8661f_config {
};
#endif /* _SUPERIO_ITE_IT8661F */

1
src/superio/ite/it8661f/it8661f.h
View File

@ -29,4 +29,3 @@
#define IT8661F_PP 0x03 /* Parallel port */
#define IT8661F_IR 0x04 /* IR */
#define IT8661F_GPIO 0x05 /* GPIO & Alternate Function Configuration */

1
src/superio/ite/it8661f/it8661f_early_serial.c
View File

@ -91,4 +91,3 @@ static void it8661f_enable_serial(device_t dev, unsigned iobase)
/* (3) Exit the configuration state (MB PnP mode). */
it8661f_sio_write(0x00, IT8661F_CONFIG_REG_CC, 0x02);
}

5
src/superio/ite/it8661f/superio.c
View File

@ -66,8 +66,8 @@ static struct device_operations ops = {
/* TODO: FDC, PP, IR, GPIO. */
static struct pnp_info pnp_dev_info[] = {
{ &ops, IT8661F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, IT8661F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
{ &ops, IT8661F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, IT8661F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
};
static void enable_dev(struct device *dev)
@ -80,4 +80,3 @@ struct chip_operations superio_ite_it8661f_ops = {
CHIP_NAME("ITE IT8661F Super I/O")
.enable_dev = enable_dev,
};

1
src/superio/ite/it8671f/Config.lb
View File

@ -20,4 +20,3 @@
config chip.h
object superio.o

1
src/superio/ite/it8671f/Makefile.inc
View File

@ -20,4 +20,3 @@
#config chip.h
obj-$(CONFIG_SUPERIO_ITE_IT8671F) += superio.o

1
src/superio/ite/it8671f/chip.h
View File

@ -33,4 +33,3 @@ struct superio_ite_it8671f_config {
};
#endif /* _SUPERIO_ITE_IT8671F */

1
src/superio/ite/it8671f/it8671f.h
View File

@ -27,4 +27,3 @@
#define IT8671F_PP 0x03 /* Parallel port */
#define IT8671F_KBCK 0x05 /* Keyboard */
#define IT8671F_KBCM 0x06 /* Mouse */

1
src/superio/ite/it8671f/it8671f_early_serial.c
View File

@ -91,4 +91,3 @@ static void it8671f_enable_serial(device_t dev, unsigned iobase)
/* (3) Exit the configuration state (MB PnP mode). */
it8671f_sio_write(0x00, IT8671F_CONFIG_REG_CC, 0x02);
}

7
src/superio/ite/it8671f/superio.c
View File

@ -70,9 +70,9 @@ static struct device_operations ops = {
/* TODO: FDC, PP, KBCM. */
static struct pnp_info pnp_dev_info[] = {
{ &ops, IT8671F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, IT8671F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
{ &ops, IT8671F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
{ &ops, IT8671F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, IT8671F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
{ &ops, IT8671F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
};
static void enable_dev(struct device *dev)
@ -85,4 +85,3 @@ struct chip_operations superio_ite_it8671f_ops = {
CHIP_NAME("ITE IT8671F Super I/O")
.enable_dev = enable_dev,
};

1
src/superio/ite/it8673f/Config.lb
View File

@ -20,4 +20,3 @@
config chip.h
object superio.o

1
src/superio/ite/it8673f/Makefile.inc
View File

@ -20,4 +20,3 @@
#config chip.h
obj-$(CONFIG_SUPERIO_ITE_IT8673F) += superio.o

1
src/superio/ite/it8673f/chip.h
View File

@ -33,4 +33,3 @@ struct superio_ite_it8673f_config {
};
#endif /* _SUPERIO_ITE_IT8673F */

1
src/superio/ite/it8673f/it8673f.h
View File

@ -28,4 +28,3 @@
#define IT8673F_FAN 0x04 /* Fan controller */
#define IT8673F_KBCK 0x05 /* Keyboard */
#define IT8673F_KBCM 0x06 /* Mouse */

1
src/superio/ite/it8673f/it8673f_early_serial.c
View File

@ -89,4 +89,3 @@ static void it8673f_enable_serial(device_t dev, unsigned iobase)
/* (3) Exit the configuration state (MB PnP mode). */
it8673f_sio_write(0x00, IT8673F_CONFIG_REG_CC, 0x02);
}

1
src/superio/ite/it8673f/superio.c
View File

@ -87,4 +87,3 @@ struct chip_operations superio_ite_it8673f_ops = {
CHIP_NAME("ITE IT8673F Super I/O")
.enable_dev = enable_dev,
};

1
src/superio/ite/it8705f/Config.lb
View File

@ -20,4 +20,3 @@
config chip.h
object superio.o

1
src/superio/ite/it8705f/Makefile.inc
View File

@ -20,4 +20,3 @@
#config chip.h
obj-$(CONFIG_SUPERIO_ITE_IT8705F) += superio.o

1
src/superio/ite/it8705f/chip.h
View File

@ -33,4 +33,3 @@ struct superio_ite_it8705f_config {
};
#endif /* _SUPERIO_ITE_IT8705F */

1
src/superio/ite/it8705f/it8705f.h
View File

@ -33,4 +33,3 @@
#define IT8705F_GAME 0x06 /* GAME port */
#define IT8705F_IR 0x07 /* Consumer IR */
#define IT8705F_MIDI 0x08 /* MIDI port */

5
src/superio/ite/it8705f/it8705f_early_serial.c
View File

@ -63,8 +63,8 @@ static void it8705f_enable_serial(device_t dev, unsigned iobase)
/* (2) Modify the data of configuration registers. */
/* Select the chip to configure (if there's more than one).
Set bit 7 to select JP3=1, clear bit 7 to select JP3=0.
If this register is not written, both chips are configured. */
Set bit 7 to select JP3=1, clear bit 7 to select JP3=0.
If this register is not written, both chips are configured. */
/* it8705f_sio_write(0x00, IT8705F_CONFIG_REG_CONFIGSEL, 0x00); */
/* Enable serial port(s). */
@ -80,4 +80,3 @@ static void it8705f_enable_serial(device_t dev, unsigned iobase)
/* (3) Exit the configuration state (MB PnP mode). */
it8705f_sio_write(0x00, IT8705F_CONFIG_REG_CC, 0x02);
}

5
src/superio/ite/it8705f/superio.c
View File

@ -74,8 +74,8 @@ static struct device_operations ops = {
/* TODO: FDC, PP, EC, GPIO, GAME, IR, MIDI. */
static struct pnp_info pnp_dev_info[] = {
{ &ops, IT8705F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, IT8705F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
{ &ops, IT8705F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, IT8705F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
};
static void enable_dev(struct device *dev)
@ -88,4 +88,3 @@ struct chip_operations superio_ite_it8705f_ops = {
CHIP_NAME("ITE IT8705F Super I/O")
.enable_dev = enable_dev,
};

1
src/superio/ite/it8712f/Config.lb
View File

@ -20,4 +20,3 @@
config chip.h
object superio.o

1
src/superio/ite/it8712f/Makefile.inc
View File

@ -20,4 +20,3 @@
#config chip.h
obj-$(CONFIG_SUPERIO_ITE_IT8712F) += superio.o

1
src/superio/ite/it8712f/chip.h
View File

@ -33,4 +33,3 @@ struct superio_ite_it8712f_config {
};
#endif /* _SUPERIO_ITE_IT8712F */

1
src/superio/ite/it8712f/it8712f.h
View File

@ -32,4 +32,3 @@
#define IT8712F_MIDI 0x08 /* MIDI port */
#define IT8712F_GAME 0x09 /* GAME port */
#define IT8712F_IR 0x0a /* Consumer IR */

11
src/superio/ite/it8712f/it8712f_early_serial.c
View File

@ -47,7 +47,6 @@ static void it8712f_sio_write(uint8_t ldn, uint8_t index, uint8_t value)
outb(value, SIO_DATA);
}
static void it8712f_enter_conf(void)
{
/* Enter the configuration state (MB PnP mode). */
@ -67,7 +66,6 @@ static void it8712f_exit_conf(void)
it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CC, 0x02);
}
static void it8712f_24mhz_clkin(void)
{
it8712f_enter_conf();
@ -76,10 +74,10 @@ static void it8712f_24mhz_clkin(void)
it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CLOCKSEL, 0x1);
it8712f_exit_conf();
}
static void it8712f_enable_3vsbsw(void) {
static void it8712f_enable_3vsbsw(void)
{
/* We need to set enable 3VSBSW#, this was documented only in IT8712F_V0.9.2!
LDN 7, reg 0x2a - needed for S3, or memory power will be cut off.
@ -93,7 +91,6 @@ static void it8712f_enable_3vsbsw(void) {
it8712f_exit_conf();
}
static void it8712f_kill_watchdog(void)
{
it8712f_enter_conf();
@ -114,8 +111,8 @@ static void it8712f_enable_serial(device_t dev, unsigned iobase)
/* (2) Modify the data of configuration registers. */
/* Select the chip to configure (if there's more than one).
Set bit 7 to select JP3=1, clear bit 7 to select JP3=0.
If this register is not written, both chips are configured. */
Set bit 7 to select JP3=1, clear bit 7 to select JP3=0.
If this register is not written, both chips are configured. */
/* it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CONFIGSEL, 0x00); */
/* Enable serial port(s). */

1
src/superio/ite/it8712f/superio.c
View File

@ -145,4 +145,3 @@ struct chip_operations superio_ite_it8712f_ops = {
CHIP_NAME("ITE IT8712F Super I/O")
.enable_dev = enable_dev,
};

1
src/superio/ite/it8716f/Config.lb
View File

@ -20,4 +20,3 @@
config chip.h
object superio.o

1
src/superio/ite/it8716f/Makefile.inc
View File

@ -20,4 +20,3 @@
#config chip.h
obj-$(CONFIG_SUPERIO_ITE_IT8716F) += superio.o

1
src/superio/ite/it8716f/chip.h
View File

@ -33,4 +33,3 @@ struct superio_ite_it8716f_config {
};
#endif /* _SUPERIO_ITE_IT8716F */

1
src/superio/ite/it8716f/it8716f.h
View File

@ -32,4 +32,3 @@
#define IT8716F_MIDI 0x08 /* MIDI port */
#define IT8716F_GAME 0x09 /* GAME port */
#define IT8716F_IR 0x0a /* Consumer IR */

1
src/superio/ite/it8716f/it8716f_early_init.c
View File

@ -35,4 +35,3 @@ static void it8716f_enable_dev(device_t dev, unsigned iobase)
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
pnp_set_enable(dev, 1);
}

3
src/superio/ite/it8716f/it8716f_early_serial.c
View File

@ -41,7 +41,7 @@
/* Perform MB PnP setup to put the SIO chip at 0x2e. */
/* Base address 0x2e: 0x87 0x01 0x55 0x55. */
/* Base address 0x4e: 0x87 0x01 0x55 0xaa. */
static inline void pnp_enter_ext_func_mode(device_t dev)
static inline void pnp_enter_ext_func_mode(device_t dev)
{
unsigned port = dev >> 8;
outb(0x87, port);
@ -68,4 +68,3 @@ static void it8716f_enable_serial(device_t dev, unsigned iobase)
pnp_set_enable(dev, 1);
pnp_exit_ext_func_mode(dev);
}

1
src/superio/ite/it8718f/Config.lb
View File

@ -20,4 +20,3 @@
config chip.h
object superio.o

1
src/superio/ite/it8718f/Makefile.inc
View File

@ -20,4 +20,3 @@
#config chip.h
obj-$(CONFIG_SUPERIO_ITE_IT8718F) += superio.o

1
src/superio/ite/it8718f/chip.h
View File

@ -33,4 +33,3 @@ struct superio_ite_it8718f_config {
};
#endif /* _SUPERIO_ITE_IT8718F */

5
src/superio/ite/it8718f/it8718f_early_serial.c
View File

@ -83,8 +83,8 @@ static void it8718f_enable_serial(device_t dev, unsigned iobase)
/* (2) Modify the data of configuration registers. */
/* Select the chip to configure (if there's more than one).
Set bit 7 to select JP3=1, clear bit 7 to select JP3=0.
If this register is not written, both chips are configured. */
Set bit 7 to select JP3=1, clear bit 7 to select JP3=0.
If this register is not written, both chips are configured. */
/* it8718f_sio_write(0x00, IT8718F_CONFIG_REG_CONFIGSEL, 0x00); */
/* Enable serial port(s). */
@ -97,4 +97,3 @@ static void it8718f_enable_serial(device_t dev, unsigned iobase)
/* (3) Exit the configuration state (MB PnP mode). */
it8718f_exit_conf();
}

7
src/superio/ite/it8718f/superio.c
View File

@ -74,9 +74,9 @@ static struct device_operations ops = {
/* TODO: FDC, PP, EC, KBCM, IR. */
static struct pnp_info pnp_dev_info[] = {
{ &ops, IT8718F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, IT8718F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
{ &ops, IT8718F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
{ &ops, IT8718F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, IT8718F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
{ &ops, IT8718F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
};
static void enable_dev(struct device *dev)
@ -89,4 +89,3 @@ struct chip_operations superio_ite_it8718f_ops = {
CHIP_NAME("ITE IT8718F Super I/O")
.enable_dev = enable_dev,
};

21
src/superio/nsc/pc8374/Config.lb
View File

@ -1,2 +1,23 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2000 AG Electronics Ltd.
## Copyright (C) 2003-2004 Linux Networx
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config chip.h
object superio.o

21
src/superio/nsc/pc8374/Makefile.inc
View File

@ -1,2 +1,23 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2000 AG Electronics Ltd.
## Copyright (C) 2003-2004 Linux Networx
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
#config chip.h
obj-$(CONFIG_SUPERIO_NSC_PC8374) += superio.o

21
src/superio/nsc/pc8374/chip.h
View File

@ -1,3 +1,24 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct chip_operations;
extern struct chip_operations superio_nsc_pc8374_ops;

21
src/superio/nsc/pc8374/pc8374.h
View File

@ -1,3 +1,24 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#define PC8374_FDC 0x00 /* Floppy */
#define PC8374_PP 0x01 /* Parallel port */
#define PC8374_SP2 0x02 /* Com2 */

24
src/superio/nsc/pc8374/pc8374_early_init.c
View File

@ -1,3 +1,24 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/romcc_io.h>
#include "pc8374.h"
@ -22,8 +43,6 @@ static void pc8374_enable(unsigned iobase, u8 *init)
val |= *init;
outb(val, iobase+1);
}
}
static void pc8374_enable_dev(device_t dev, unsigned iobase)
@ -34,4 +53,3 @@ static void pc8374_enable_dev(device_t dev, unsigned iobase)
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
pnp_set_enable(dev, 1);
}

42
src/superio/nsc/pc8374/superio.c
View File

@ -1,6 +1,23 @@
/* Copyright 2000 AG Electronics Ltd. */
/* Copyright 2003-2004 Linux Networx */
/* This code is distributed without warranty under the GPL v2 (see COPYING) */
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
#include <device/device.h>
@ -26,7 +43,7 @@ static void init(device_t dev)
}
conf = dev->chip_info;
switch(dev->path.pnp.device) {
case PC8374_SP1:
case PC8374_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com1);
break;
@ -51,17 +68,16 @@ static struct device_operations ops = {
};
static struct pnp_info pnp_dev_info[] = {
{ &ops, PC8374_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
{ &ops, PC8374_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, },
{ &ops, PC8374_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
{ &ops, PC8374_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, PC8374_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, },
{ &ops, PC8374_KBCM, PNP_IRQ0 },
{ &ops, PC8374_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
{ &ops, PC8374_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
{ &ops, PC8374_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
{ &ops, PC8374_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, },
{ &ops, PC8374_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
{ &ops, PC8374_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, PC8374_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, },
{ &ops, PC8374_KBCM, PNP_IRQ0 },
{ &ops, PC8374_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
{ &ops, PC8374_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
};
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &ops,

13
src/superio/nsc/pc87309/Config.lb
View File

@ -1,23 +1,22 @@
##
##
## This file is part of the coreboot project.
##
##
## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
##
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
##
config chip.h
object superio.o

13
src/superio/nsc/pc87309/Makefile.inc
View File

@ -1,23 +1,22 @@
##
##
## This file is part of the coreboot project.
##
##
## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
##
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
##
#config chip.h
obj-$(CONFIG_SUPERIO_NSC_PC87309) += superio.o

2
src/superio/nsc/pc87309/superio.c
View File

@ -66,7 +66,7 @@ static struct pnp_info pnp_dev_info[] = {
{&ops, PC87309_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x04f8, 0},},
{&ops, PC87309_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, {0x7f8, 0},},
{&ops, PC87309_SP1, PNP_IO0 | PNP_IRQ0, {0x7f8, 0},},
// TODO: PM.
/* TODO: PM. */
{&ops, PC87309_KBCM, PNP_IRQ0},
{&ops, PC87309_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x7f8, 0}, {0x7f8, 0x4},},
};

21
src/superio/nsc/pc87351/Config.lb
View File

@ -1,2 +1,23 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2000 AG Electronics Ltd.
## Copyright (C) 2003-2004 Linux Networx
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config chip.h
object superio.o

21
src/superio/nsc/pc87351/Makefile.inc
View File

@ -1,2 +1,23 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2000 AG Electronics Ltd.
## Copyright (C) 2003-2004 Linux Networx
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
#config chip.h
obj-$(CONFIG_SUPERIO_NSC_PC87351) += superio.o

21
src/superio/nsc/pc87351/chip.h
View File

@ -1,3 +1,24 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct chip_operations;
extern struct chip_operations superio_nsc_pc87351_ops;

21
src/superio/nsc/pc87351/pc87351.h
View File

@ -1,3 +1,24 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#define PC87351_FDC 0x00 /* Floppy */
#define PC87351_PP 0x01 /* Parallel port */
#define PC87351_SP2 0x02 /* Com2 */

21
src/superio/nsc/pc87351/pc87351_early_serial.c
View File

@ -1,3 +1,24 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/romcc_io.h>
#include "pc87351.h"

50
src/superio/nsc/pc87351/superio.c
View File

@ -1,12 +1,29 @@
/* Copyright 2000 AG Electronics Ltd. */
/* Copyright 2003-2004 Linux Networx */
/* This code is distributed without warranty under the GPL v2 (see COPYING) */
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/*
* Richard A Smith
/*
* Richard A Smith
* I derived this code from the pc87360 device and removed the stuff the 87351
* dosen't do.
*/
*/
#include <arch/io.h>
#include <device/device.h>
@ -32,7 +49,7 @@ static void init(device_t dev)
}
conf = dev->chip_info;
switch(dev->path.pnp.device) {
case PC87351_SP1:
case PC87351_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com1);
break;
@ -57,18 +74,17 @@ static struct device_operations ops = {
};
static struct pnp_info pnp_dev_info[] = {
{ &ops, PC87351_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
{ &ops, PC87351_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, },
{ &ops, PC87351_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
{ &ops, PC87351_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, PC87351_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, },
{ &ops, PC87351_KBCM, PNP_IRQ0 },
{ &ops, PC87351_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
{ &ops, PC87351_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
{ &ops, PC87351_FSD, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
{ &ops, PC87351_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
{ &ops, PC87351_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, },
{ &ops, PC87351_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
{ &ops, PC87351_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, PC87351_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, },
{ &ops, PC87351_KBCM, PNP_IRQ0 },
{ &ops, PC87351_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
{ &ops, PC87351_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
{ &ops, PC87351_FSD, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
};
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &pnp_ops,

21
src/superio/nsc/pc87360/Config.lb
View File

@ -1,2 +1,23 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2000 AG Electronics Ltd.
## Copyright (C) 2003-2004 Linux Networx
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config chip.h
object superio.o

21
src/superio/nsc/pc87360/Makefile.inc
View File

@ -1,2 +1,23 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2000 AG Electronics Ltd.
## Copyright (C) 2003-2004 Linux Networx
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
#config chip.h
obj-$(CONFIG_SUPERIO_NSC_PC87360) += superio.o

21
src/superio/nsc/pc87360/chip.h
View File

@ -1,3 +1,24 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct chip_operations;
extern struct chip_operations superio_nsc_pc87360_ops;

21
src/superio/nsc/pc87360/pc87360.h
View File

@ -1,3 +1,24 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#define PC87360_FDC 0x00 /* Floppy */
#define PC87360_PP 0x01 /* Parallel port */
#define PC87360_SP2 0x02 /* Com2 */

22
src/superio/nsc/pc87360/pc87360_early_serial.c
View File

@ -1,7 +1,27 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/romcc_io.h>
#include "pc87360.h"
static void pc87360_enable_serial(device_t dev, unsigned iobase)
{
pnp_set_logical_device(dev);

48
src/superio/nsc/pc87360/superio.c
View File

@ -1,6 +1,23 @@
/* Copyright 2000 AG Electronics Ltd. */
/* Copyright 2003-2004 Linux Networx */
/* This code is distributed without warranty under the GPL v2 (see COPYING) */
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
#include <device/device.h>
@ -26,7 +43,7 @@ static void init(device_t dev)
}
conf = dev->chip_info;
switch(dev->path.pnp.device) {
case PC87360_SP1:
case PC87360_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com1);
break;
@ -51,20 +68,19 @@ static struct device_operations ops = {
};
static struct pnp_info pnp_dev_info[] = {
{ &ops, PC87360_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
{ &ops, PC87360_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, },
{ &ops, PC87360_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
{ &ops, PC87360_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, PC87360_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, },
{ &ops, PC87360_KBCM, PNP_IRQ0 },
{ &ops, PC87360_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
{ &ops, PC87360_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
{ &ops, PC87360_ACB, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
{ &ops, PC87360_FSCM, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
{ &ops, PC87360_WDT, PNP_IO0 | PNP_IRQ0, { 0xfffc, 0 } },
{ &ops, PC87360_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
{ &ops, PC87360_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, },
{ &ops, PC87360_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
{ &ops, PC87360_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, PC87360_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, },
{ &ops, PC87360_KBCM, PNP_IRQ0 },
{ &ops, PC87360_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
{ &ops, PC87360_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
{ &ops, PC87360_ACB, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
{ &ops, PC87360_FSCM, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
{ &ops, PC87360_WDT, PNP_IO0 | PNP_IRQ0, { 0xfffc, 0 } },
};
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &ops,

21
src/superio/nsc/pc87366/Config.lb
View File

@ -1,2 +1,23 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2000 AG Electronics Ltd.
## Copyright (C) 2003-2004 Linux Networx
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config chip.h
object superio.o

21
src/superio/nsc/pc87366/Makefile.inc
View File

@ -1,2 +1,23 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2000 AG Electronics Ltd.
## Copyright (C) 2003-2004 Linux Networx
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
#config chip.h
obj-$(CONFIG_SUPERIO_NSC_PC87366) += superio.o

21
src/superio/nsc/pc87366/chip.h
View File

@ -1,3 +1,24 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern struct chip_operations superio_nsc_pc87366_ops;
#include <pc80/keyboard.h>

22
src/superio/nsc/pc87366/pc87366.h
View File

@ -1,3 +1,24 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#define PC87366_FDC 0x00 /* Floppy */
#define PC87366_PP 0x01 /* Parallel port */
#define PC87366_SP2 0x02 /* Com2 */
@ -13,4 +34,3 @@
#define PC87366_MIDI 0x0C
#define PC87366_VLM 0x0D
#define PC87366_TMS 0x0E

22
src/superio/nsc/pc87366/pc87366_early_serial.c
View File

@ -1,7 +1,27 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/romcc_io.h>
#include "pc87366.h"
static void pc87366_enable_serial(device_t dev, unsigned iobase)
{
pnp_set_logical_device(dev);

50
src/superio/nsc/pc87366/superio.c
View File

@ -1,6 +1,23 @@
/* Copyright 2000 AG Electronics Ltd. */
/* Copyright 2003-2004 Linux Networx */
/* This code is distributed without warranty under the GPL v2 (see COPYING) */
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
#include <device/device.h>
@ -26,7 +43,7 @@ static void init(device_t dev)
}
conf = dev->chip_info;
switch(dev->path.pnp.device) {
case PC87366_SP1:
case PC87366_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com1);
break;
@ -51,23 +68,22 @@ static struct device_operations ops = {
};
static struct pnp_info pnp_dev_info[] = {
{ &ops, PC87366_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
{ &ops, PC87366_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, },
{ &ops, PC87366_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
{ &ops, PC87366_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, PC87366_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, },
{ &ops, PC87366_KBCM, PNP_IRQ0 },
{ &ops, PC87366_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
{ &ops, PC87366_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
{ &ops, PC87366_ACB, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
{ &ops, PC87366_FSCM, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
{ &ops, PC87366_WDT, PNP_IO0 | PNP_IRQ0, { 0xfffc, 0 } },
{ &ops, PC87366_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
{ &ops, PC87366_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, },
{ &ops, PC87366_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
{ &ops, PC87366_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, PC87366_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, },
{ &ops, PC87366_KBCM, PNP_IRQ0 },
{ &ops, PC87366_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
{ &ops, PC87366_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
{ &ops, PC87366_ACB, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
{ &ops, PC87366_FSCM, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
{ &ops, PC87366_WDT, PNP_IO0 | PNP_IRQ0, { 0xfffc, 0 } },
};
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &pnp_ops,
pnp_enable_devices(dev, &pnp_ops,
ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}

22
src/superio/nsc/pc87417/Config.lb
View File

@ -1,2 +1,24 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2000 AG Electronics Ltd.
## Copyright (C) 2003-2004 Linux Networx
## Copyright (C) 2004 Tyan by yhlu
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config chip.h
object superio.o

22
src/superio/nsc/pc87417/Makefile.inc
View File

@ -1,2 +1,24 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2000 AG Electronics Ltd.
## Copyright (C) 2003-2004 Linux Networx
## Copyright (C) 2004 Tyan by yhlu
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
#config chip.h
obj-$(CONFIG_SUPERIO_NSC_PC87417) += superio.o

22
src/superio/nsc/pc87417/chip.h
View File

@ -1,3 +1,25 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
* Copyright (C) 2004 Tyan by yhlu
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern struct chip_operations superio_nsc_pc87417_ops;
#include <pc80/keyboard.h>

26
src/superio/nsc/pc87417/pc87417.h
View File

@ -1,3 +1,25 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
* Copyright (C) 2004 Tyan by yhlu
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#define PC87417_FDC 0x00 /* Floppy */
#define PC87417_PP 0x01 /* Parallel Port */
#define PC87417_SP2 0x02 /* Com2 */
@ -11,7 +33,7 @@
#define PC87417_GPIO_DEV PNP_DEV(0x2e, PC87417_GPIO)
/* This is to get around a romcc bug */
//#define PC87417_XBUS_DEV PNP_DEV(0x2e, PC87417_XBUS)
/* #define PC87417_XBUS_DEV PNP_DEV(0x2e, PC87417_XBUS) */
#define PC87417_XBUS_DEV PNP_DEV(0x2e, 0x0f)
#define PC87417_GPSEL 0xf0
@ -88,5 +110,3 @@
#define PC87417_HAP1 0x14
#define PC87417_XSCNF 0x15
#define PC87417_XWBCNF 0x16

28
src/superio/nsc/pc87417/pc87417_early_init.c
View File

@ -1,3 +1,25 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
* Copyright (C) 2004 Tyan by yhlu
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/romcc_io.h>
#include "pc87417.h"
@ -6,6 +28,7 @@ static void pc87417_disable_dev(device_t dev)
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
}
static void pc87417_enable_dev(device_t dev, unsigned iobase)
{
pnp_set_logical_device(dev);
@ -13,6 +36,7 @@ static void pc87417_enable_dev(device_t dev, unsigned iobase)
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
pnp_set_enable(dev, 1);
}
static void xbus_cfg(device_t dev)
{
uint8_t i, data;
@ -27,5 +51,5 @@ static void xbus_cfg(device_t dev)
for (i=0; i<= 0xf; i++) {
outb((i<<4), xbus_index + PC87417_HAP0);
}
return;
}
return;
}

28
src/superio/nsc/pc87417/pc87417_early_serial.c
View File

@ -1,7 +1,28 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
* Copyright (C) 2004 Tyan by yhlu
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/romcc_io.h>
#include "pc87417.h"
static void pc87417_enable_serial(device_t dev, unsigned iobase)
{
pnp_set_logical_device(dev);
@ -9,8 +30,9 @@ static void pc87417_enable_serial(device_t dev, unsigned iobase)
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
pnp_set_enable(dev, 1);
}
static void pc87417_enable_dev(device_t dev)
{
pnp_set_logical_device(dev);
pnp_set_enable(dev, 1);
pnp_set_logical_device(dev);
pnp_set_enable(dev, 1);
}

49
src/superio/nsc/pc87417/superio.c
View File

@ -1,8 +1,24 @@
/* Copyright 2000 AG Electronics Ltd. */
/* Copyright 2003-2004 Linux Networx */
/* Copyright 2005 Tyan */
/* By yhlu */
/* This code is distributed without warranty under the GPL v2 (see COPYING) */
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
* Copyright (C) 2004 Tyan by yhlu
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
#include <device/device.h>
@ -28,7 +44,7 @@ static void init(device_t dev)
}
conf = dev->chip_info;
switch(dev->path.pnp.device) {
case PC87417_SP1:
case PC87417_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com1);
break;
@ -53,19 +69,18 @@ static struct device_operations ops = {
};
static struct pnp_info pnp_dev_info[] = {
{ &ops, PC87417_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
{ &ops, PC87417_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, },
{ &ops, PC87417_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
{ &ops, PC87417_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, PC87417_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, },
{ &ops, PC87417_KBCM, PNP_IRQ0 },
{ &ops, PC87417_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
{ &ops, PC87417_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
{ &ops, PC87417_XBUS, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
{ &ops, PC87417_RTC, PNP_IO0 | PNP_IO1, { 0xfffe, 0 }, {0xfffe, 0x4} },
{ &ops, PC87417_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
{ &ops, PC87417_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, },
{ &ops, PC87417_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
{ &ops, PC87417_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, PC87417_SWC, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, },
{ &ops, PC87417_KBCM, PNP_IRQ0 },
{ &ops, PC87417_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
{ &ops, PC87417_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
{ &ops, PC87417_XBUS, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
{ &ops, PC87417_RTC, PNP_IO0 | PNP_IO1, { 0xfffe, 0 }, {0xfffe, 0x4} },
};
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &pnp_ops,

21
src/superio/nsc/pc87427/Config.lb
View File

@ -1,2 +1,23 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2000 AG Electronics Ltd.
## Copyright (C) 2003-2004 Linux Networx
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config chip.h
object superio.o

21
src/superio/nsc/pc87427/Makefile.inc
View File

@ -1,2 +1,23 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2000 AG Electronics Ltd.
## Copyright (C) 2003-2004 Linux Networx
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
#config chip.h
obj-$(CONFIG_SUPERIO_NSC_PC87427) += superio.o

21
src/superio/nsc/pc87427/chip.h
View File

@ -1,3 +1,24 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
extern struct chip_operations superio_nsc_pc87427_ops;
#include <pc80/keyboard.h>

2
src/superio/nsc/pc87427/pc87427.h
View File

@ -13,7 +13,7 @@
#define PC87427_GPIO_DEV PNP_DEV(0x2e, PC87427_GPIO)
/* This is to get around a romcc bug */
//#define PC87427_XBUS_DEV PNP_DEV(0x2e, PC87427_XBUS)
/* #define PC87427_XBUS_DEV PNP_DEV(0x2e, PC87427_XBUS) */
#define PC87427_XBUS_DEV PNP_DEV(0x2e, 0x0f)
#define PC87427_GPSEL 0xf0

25
src/superio/nsc/pc87427/pc87427_early_init.c
View File

@ -1,3 +1,24 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/romcc_io.h>
#include "pc87427.h"
@ -27,5 +48,5 @@ static void xbus_cfg(device_t dev)
for (i=0; i<= 0xf; i++) {
outb((i<<4), xbus_index + PC87427_HAP0);
}
return;
}
return;
}

55
src/superio/nsc/pc87427/superio.c
View File

@ -1,6 +1,23 @@
/* Copyright 2000 AG Electronics Ltd. */
/* Copyright 2003-2004 Linux Networx */
/* This code is distributed without warranty under the GPL v2 (see COPYING) */
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
#include <device/device.h>
@ -12,7 +29,6 @@
#include "chip.h"
#include "pc87427.h"
static void init(device_t dev)
{
struct superio_nsc_pc87427_config *conf;
@ -25,7 +41,7 @@ static void init(device_t dev)
}
conf = dev->chip_info;
switch(dev->path.pnp.device) {
case PC87427_SP1:
case PC87427_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com1);
break;
@ -50,26 +66,25 @@ static struct device_operations ops = {
};
static struct pnp_info pnp_dev_info[] = {
{ &ops, PC87427_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
{ &ops, PC87427_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, PC87427_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, PC87427_SWC, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IO3 | PNP_IRQ0,
{ 0xfff0, 0 }, { 0xfffc, 0 }, { 0xfffc, 0 }, { 0xfff8, 0 } },
{ &ops, PC87427_KBCM, PNP_IRQ0 },
{ &ops, PC87427_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
{ &ops, PC87427_GPIO, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
{ &ops, PC87427_WDT, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 } },
{ &ops, PC87427_FMC, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
{ &ops, PC87427_XBUS, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
{ &ops, PC87427_RTC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xfffe, 0 }, { 0xfffe, 0 } },
{ &ops, PC87427_MHC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffe0, 0 }, { 0xffe0, 0 } },
{ &ops, PC87427_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
{ &ops, PC87427_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, PC87427_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, PC87427_SWC, PNP_IO0 | PNP_IO1 | PNP_IO2 | PNP_IO3 | PNP_IRQ0,
{ 0xfff0, 0 }, { 0xfffc, 0 }, { 0xfffc, 0 }, { 0xfff8, 0 } },
{ &ops, PC87427_KBCM, PNP_IRQ0 },
{ &ops, PC87427_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
{ &ops, PC87427_GPIO, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
{ &ops, PC87427_WDT, PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 } },
{ &ops, PC87427_FMC, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
{ &ops, PC87427_XBUS, PNP_IO0 | PNP_IRQ0, { 0xffe0, 0 } },
{ &ops, PC87427_RTC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xfffe, 0 }, { 0xfffe, 0 } },
{ &ops, PC87427_MHC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffe0, 0 }, { 0xffe0, 0 } },
};
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &ops,
ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_nsc_pc87427_ops = {

20
src/superio/nsc/pc97307/Config.lb
View File

@ -1,2 +1,22 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2000 AG Electronics Ltd.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config chip.h
object superio.c

20
src/superio/nsc/pc97307/Makefile.inc
View File

@ -1,2 +1,22 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2000 AG Electronics Ltd.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
#config chip.h
obj-$(CONFIG_SUPERIO_NSC_PC97307) += superio.o

20
src/superio/nsc/pc97307/chip.h
View File

@ -1,3 +1,23 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef _SUPERIO_NSC_PC97307
#define _SUPERIO_NSC_PC97307

20
src/superio/nsc/pc97307/pc97307.h
View File

@ -1,3 +1,23 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#define PC97307_KBCK 0x00 /* Keyboard */
#define PC97307_KBCM 0x01 /* Mouse */
#define PC97307_RTC 0x02 /* Real-Time Clock */

39
src/superio/nsc/pc97307/superio.c
View File

@ -1,5 +1,22 @@
/* Copyright 2000 AG Electronics Ltd. */
/* This code is distributed without warranty under the GPL v2 (see COPYING) */
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
#include <console/console.h>
@ -66,15 +83,15 @@ static struct device_operations ops = {
};
static struct pnp_info pnp_dev_info[] = {
{ &ops, PC97307_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffb, 0 }, { 0xffb, 0x4}, },
{ &ops, PC97307_KBCM, PNP_IRQ0 },
{ &ops, PC97307_RTC, PNP_IO0 | PNP_IRQ0, { 0xfffe, 0}, },
{ &ops, PC97307_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0xfffa, 0}, },
{ &ops, PC97307_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x03fc, 0}, },
{ &ops, PC97307_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0xfff8, 0 }, },
{ &ops, PC97307_SP1, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 }, },
{ &ops, PC97307_GPIO, PNP_IO0, { 0xfff8, 0 } },
{ &ops, PC97307_PM, PNP_IO0, { 0xfffe, 0 } },
{ &ops, PC97307_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffb, 0 }, { 0xffb, 0x4}, },
{ &ops, PC97307_KBCM, PNP_IRQ0 },
{ &ops, PC97307_RTC, PNP_IO0 | PNP_IRQ0, { 0xfffe, 0}, },
{ &ops, PC97307_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0xfffa, 0}, },
{ &ops, PC97307_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x03fc, 0}, },
{ &ops, PC97307_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0xfff8, 0 }, },
{ &ops, PC97307_SP1, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 }, },
{ &ops, PC97307_GPIO, PNP_IO0, { 0xfff8, 0 } },
{ &ops, PC97307_PM, PNP_IO0, { 0xfffe, 0 } },
};
static void enable_dev(struct device *dev)

20
src/superio/nsc/pc97317/Config.lb
View File

@ -1,2 +1,22 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2000 AG Electronics Ltd.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config chip.h
object superio.c

20
src/superio/nsc/pc97317/Makefile.inc
View File

@ -1,2 +1,22 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2000 AG Electronics Ltd.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
#config chip.h
obj-$(CONFIG_SUPERIO_NSC_PC97317) += superio.o

21
src/superio/nsc/pc97317/chip.h
View File

@ -1,3 +1,23 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef _SUPERIO_NSC_PC97317
#define _SUPERIO_NSC_PC97317
@ -17,4 +37,5 @@ struct superio_nsc_pc97317_config {
struct uart8250 com1, com2;
struct pc_keyboard keyboard;
};
#endif /* _SUPERIO_NSC_PC97317 */

21
src/superio/nsc/pc97317/pc97317.h
View File

@ -1,3 +1,23 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#define PC97317_KBCK 0x00 /* Keyboard */
#define PC97317_KBCM 0x01 /* Mouse */
#define PC97317_RTC 0x02 /* Real-Time Clock */
@ -7,4 +27,3 @@
#define PC97317_SP1 0x06 /* Com1 */
#define PC97317_GPIO 0x07
#define PC97317_PM 0x08 /* Power Management */

22
src/superio/nsc/pc97317/pc97317_early_serial.c
View File

@ -1,3 +1,23 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/romcc_io.h>
#include "pc97317.h"
@ -19,7 +39,7 @@ static void pc97317_enable_serial(device_t dev, unsigned iobase)
outb(0x03, PM_BASE);
outb(inb(PM_BASE + 1) | 0x07, PM_BASE + 1);
/* Wait for the clock to stabilise */
while(!inb(PM_BASE + 1 & 0x80))
;

39
src/superio/nsc/pc97317/superio.c
View File

@ -1,5 +1,22 @@
/* Copyright 2000 AG Electronics Ltd. */
/* This code is distributed without warranty under the GPL v2 (see COPYING) */
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
#include <console/console.h>
@ -68,15 +85,15 @@ static struct device_operations ops = {
};
static struct pnp_info pnp_dev_info[] = {
{ &ops, PC97317_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffb, 0 }, { 0xffb, 0x4}, },
{ &ops, PC97317_KBCM, PNP_IRQ0 },
{ &ops, PC97317_RTC, PNP_IO0 | PNP_IRQ0, { 0xfffe, 0}, },
{ &ops, PC97317_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0xfffa, 0}, },
{ &ops, PC97317_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x03fc, 0}, },
{ &ops, PC97317_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0xfff8, 0 }, },
{ &ops, PC97317_SP1, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 }, },
{ &ops, PC97317_GPIO, PNP_IO0, { 0xfff8, 0 } },
{ &ops, PC97317_PM, PNP_IO0, { 0xfffe, 0 } },
{ &ops, PC97317_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffb, 0 }, { 0xffb, 0x4}, },
{ &ops, PC97317_KBCM, PNP_IRQ0 },
{ &ops, PC97317_RTC, PNP_IO0 | PNP_IRQ0, { 0xfffe, 0}, },
{ &ops, PC97317_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0xfffa, 0}, },
{ &ops, PC97317_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x03fc, 0}, },
{ &ops, PC97317_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0xfff8, 0 }, },
{ &ops, PC97317_SP1, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 }, },
{ &ops, PC97317_GPIO, PNP_IO0, { 0xfff8, 0 } },
{ &ops, PC97317_PM, PNP_IO0, { 0xfffe, 0 } },
};
static void enable_dev(struct device *dev)

1
src/superio/smsc/fdc37m60x/Config.lb
View File

@ -20,4 +20,3 @@
config chip.h
object superio.o

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