soc/amd/common/data_fabric/domain: set and use max_subordinate

Set the maximum subordinate bus number of the domain to the last PCI bus
number that is decoded to this PCI root. This makes sure that the
resource allocator knows the maximum number of PCI buses on this PCI
root to not assign bus numbers to buses below this PCI root that aren't
routed to that PCI root.

Now that we have this info in the link list structure or the domain
device, we can pass the max_subordinate field to the
acpigen_resource_producer_bus_number call and can leave the subordinate
number after pci_domain_scan_bus is done unchanged instead of setting it
to the limit.

TEST=On Mandolin both the bus resource producer in _SB\PCI0\_CRS and the
PCI bus number allocation remain unchanged.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I2ee75b2a7054a306b0c7d98c5357391c029187bb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77112
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2023-08-08 21:38:43 +02:00
parent 8cb14becbc
commit 9dcdec5c2f
1 changed files with 4 additions and 7 deletions

View File

@ -25,13 +25,10 @@ void amd_pci_domain_scan_bus(struct device *domain)
domain->link_list->secondary = bus; domain->link_list->secondary = bus;
/* subordinate needs to be the same as secondary before pci_domain_scan_bus call. */ /* subordinate needs to be the same as secondary before pci_domain_scan_bus call. */
domain->link_list->subordinate = bus; domain->link_list->subordinate = bus;
/* Tell allocator about maximum PCI bus number in domain */
domain->link_list->max_subordinate = limit;
pci_domain_scan_bus(domain); pci_domain_scan_bus(domain);
/* pci_domain_scan_bus will modify subordinate, so change it back to the maximum
bus number decoded to this PCI root for the acpigen_resource_producer_bus_number
call to write the correct ACPI code. */
domain->link_list->subordinate = limit;
} }
/* Read the registers and return normalized values */ /* Read the registers and return normalized values */
@ -246,9 +243,9 @@ void amd_pci_domain_fill_ssdt(const struct device *domain)
/* PCI bus number range in domain */ /* PCI bus number range in domain */
printk(BIOS_DEBUG, "%s _CRS: adding busses [%x-%x]\n", acpi_device_name(domain), printk(BIOS_DEBUG, "%s _CRS: adding busses [%x-%x]\n", acpi_device_name(domain),
domain->link_list->secondary, domain->link_list->subordinate); domain->link_list->secondary, domain->link_list->max_subordinate);
acpigen_resource_producer_bus_number(domain->link_list->secondary, acpigen_resource_producer_bus_number(domain->link_list->secondary,
domain->link_list->subordinate); domain->link_list->max_subordinate);
if (domain->link_list->secondary == 0) { if (domain->link_list->secondary == 0) {
/* ACPI 6.4.2.5 I/O Port Descriptor */ /* ACPI 6.4.2.5 I/O Port Descriptor */