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libpayload arm64: fix mmu_disable() cache problem 

The raw_write_sctlr_current() cannot be used in mmu_disable() because
it pushes some registers to cached stack, and then just after cache
disabled, the value was gone.

BRANCH=none
BUG=none
TEST=build and boot on mt8173-evb

Change-Id: I512405b7917f27d16bdd3c51d9459827ad714e67
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: aafe64922cc4cd01ecb099db106d04538e3e57ff
Original-Change-Id: I0dda8518d14c46fae1fe76e3629bd4ee81c1e0ee
Original-Signed-off-by: HC Yen <hc.yen@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/240323
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/8799
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
HC Yen 2015-01-12 18:53:01 +08:00 committed by Patrick Georgi
parent 11e743ce26
commit 9dd2cf695d
1 changed files with 3 additions and 2 deletions
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5
payloads/libpayload/arch/arm64/mmu.c
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@ -332,9 +332,10 @@ static uint32_t is_mmu_enabled(void)
*/ */
void mmu_disable(void) void mmu_disable(void)
{ {
uint32_t el = get_current_el();
uint32_t sctlr; uint32_t sctlr;
sctlr = raw_read_sctlr_current(); sctlr = raw_read_sctlr(el);
sctlr &= ~(SCTLR_C | SCTLR_M | SCTLR_I); sctlr &= ~(SCTLR_C | SCTLR_M | SCTLR_I);
tlbiall_current(); tlbiall_current();
@ -343,7 +344,7 @@ void mmu_disable(void)
dsb(); dsb();
isb(); isb();
raw_write_sctlr_current(sctlr); raw_write_sctlr(sctlr, el);
dcache_clean_invalidate_all(); dcache_clean_invalidate_all();
dsb(); dsb();