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co processor support with s2891 

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2310 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Yinghai Lu 2006-05-18 17:09:14 +00:00
parent 9a8e36da2d
commit 9dd8d56192
2 changed files with 20 additions and 4 deletions
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16
src/mainboard/tyan/s2891/get_bus_conf.c
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@ -20,6 +20,7 @@
unsigned char bus_8131_0; //7
unsigned char bus_8131_1; //8
unsigned char bus_8131_2; //9
unsigned char bus_coproc_0;
unsigned apicid_ck804;
unsigned apicid_8131_1;
unsigned apicid_8131_2;
@ -28,9 +29,9 @@ unsigned sblk;
unsigned pci1234[] =
{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not
//You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
0x0000ff0,
0x0000ff0,
// 0x0000ff0,
0x0000000,
0x0000200,
0x0000100,
// 0x0000ff0,
// 0x0000ff0,
// 0x0000ff0,
@ -43,7 +44,7 @@ unsigned hcdn[] =
{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
0x20202020,
0x20202020,
// 0x20202020,
0x20202020,
// 0x20202020,
// 0x20202020,
// 0x20202020,
@ -52,6 +53,7 @@ unsigned hcdn[] =
};
unsigned sbdn3;
unsigned coprocdn;
extern void get_sblk_pci1234(void);
@ -79,6 +81,12 @@ void get_bus_conf(void)
// bus_ck804_0 = node_link_to_bus(0, sblk);
bus_ck804_0 = (pci1234[0] >> 16) & 0xff;
if(pci1234[2] & 1) {
bus_coproc_0 = (pci1234[2] >> 16) & 0xff;
coprocdn = (hcdn[2] & 0xff);
}
/* CK804 */
dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn + 0x09,0));

8
src/mainboard/tyan/s2891/irq_tables.c
View File

@ -38,10 +38,12 @@ extern unsigned char bus_ck804_5; //6
extern unsigned char bus_8131_0;//7
extern unsigned char bus_8131_1;//8
extern unsigned char bus_8131_2;//9
extern unsigned char bus_coproc_0;
extern unsigned sbdn;
extern unsigned hcdn[];
extern unsigned sbdn3;
extern unsigned coprocdn;
extern void get_bus_conf(void);
@ -92,6 +94,12 @@ unsigned long write_pirq_routing_table(unsigned long addr)
write_pirq_info(pirq_info, bus_8131_0, (sbdn3<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
//co processor
if(pci1234[2] & 1) {
write_pirq_info(pirq_info, bus_coproc_0, (coprocdn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
pirq_info++; slot_num++;
}
#if 0
//smbus
write_pirq_info(pirq_info, bus_ck804_0, ((sbdn+1)<<3)|0, 0x2, 0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);