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Replicate TOP_MEM and TOP_MEM2 from BSP to AP CPU 

The search loop for UMA resource was only used to check for the highest
RAM address below 4GB. The cached values from BSP CPU can now be used
for the replication.

Change-Id: I5244ffa6f8a93f5ff5aaf8a71bd006b0f9cd518a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/1388
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Kyösti Mälkki 2012-08-05 12:12:05 +03:00 committed by Alexandru Gagniuc
parent dbc4739a0d
commit 9de0fee935
1 changed files with 21 additions and 28 deletions
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49
src/cpu/amd/mtrr/amd_mtrr.c
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@ -102,20 +102,6 @@ static void set_fixed_mtrr_resource(void *gp, struct device *dev, struct resourc
} }
static void uma_fb_resource(void *gp, struct device *dev, struct resource *res)
{
struct mem_state *state = gp;
unsigned long topk;
topk = resk(res->base + res->size);
if (state->tom2k < topk) {
state->tom2k = topk;
}
if ((topk < 4*1024*1024) && (state->tomk < topk)) {
state->tomk = topk;
}
}
/* These will likely move to some device node or cbmem. */ /* These will likely move to some device node or cbmem. */
static uint64_t amd_topmem = 0; static uint64_t amd_topmem = 0;
static uint64_t amd_topmem2 = 0; static uint64_t amd_topmem2 = 0;
@ -154,6 +140,25 @@ void setup_bsp_ramtop(void)
amd_topmem2 = (uint64_t) msr2.hi<<32 | msr2.lo; amd_topmem2 = (uint64_t) msr2.hi<<32 | msr2.lo;
} }
static void setup_ap_ramtop(void)
{
msr_t msr;
uint64_t v;
v = bsp_topmem();
if (!v)
return;
msr.hi = v >> 32;
msr.lo = (uint32_t) v;
wrmsr(TOP_MEM, msr);
v = bsp_topmem2();
msr.hi = v >> 32;
msr.lo = (uint32_t) v;
wrmsr(TOP_MEM2, msr);
}
void amd_setup_mtrrs(void) void amd_setup_mtrrs(void)
{ {
unsigned long address_bits; unsigned long address_bits;
@ -184,9 +189,6 @@ void amd_setup_mtrrs(void)
set_fixed_mtrrs(0, NUM_FIXED_RANGES, MTRR_TYPE_UNCACHEABLE); set_fixed_mtrrs(0, NUM_FIXED_RANGES, MTRR_TYPE_UNCACHEABLE);
state.tomk = state.tom2k = 0; state.tomk = state.tom2k = 0;
search_global_resources(
IORESOURCE_MEM | IORESOURCE_UMA_FB, IORESOURCE_MEM | IORESOURCE_UMA_FB,
uma_fb_resource, &state);
search_global_resources( search_global_resources(
IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE, IORESOURCE_MEM | IORESOURCE_CACHEABLE,
set_fixed_mtrr_resource, &state); set_fixed_mtrr_resource, &state);
@ -195,20 +197,11 @@ void amd_setup_mtrrs(void)
disable_cache(); disable_cache();
/* Round state.tomk up to the next greater size that will fit in TOP_MEM */ setup_ap_ramtop();
state.tomk = (state.tomk + TOP_MEM_MASK_KB) & ~TOP_MEM_MASK_KB;
msr.hi = state.tomk >> 22;
msr.lo = state.tomk << 10;
wrmsr(TOP_MEM, msr);
/* if DRAM above 4GB: set SYSCFG_MSR_TOM2En and SYSCFG_MSR_TOM2WB */ /* if DRAM above 4GB: set SYSCFG_MSR_TOM2En and SYSCFG_MSR_TOM2WB */
sys_cfg.lo &= ~(SYSCFG_MSR_TOM2En | SYSCFG_MSR_TOM2WB); sys_cfg.lo &= ~(SYSCFG_MSR_TOM2En | SYSCFG_MSR_TOM2WB);
if(state.tom2k > (4*1024*1024)) { if (bsp_topmem2() > (uint64_t)1<<32) {
/* Round state.tomk up to the next greater size that will fit in TOP_MEM2 */
state.tom2k = (state.tom2k + TOP_MEM_MASK_KB) & ~TOP_MEM_MASK_KB;
msr.hi = state.tom2k >> 22;
msr.lo = state.tom2k << 10;
wrmsr(TOP_MEM2, msr);
sys_cfg.lo |= SYSCFG_MSR_TOM2En; sys_cfg.lo |= SYSCFG_MSR_TOM2En;
if(has_tom2wb) if(has_tom2wb)
sys_cfg.lo |= SYSCFG_MSR_TOM2WB; sys_cfg.lo |= SYSCFG_MSR_TOM2WB;