mb/google/skyrim: Enable variants for Skyrim

BUG=b:214414033
TEST=builds
BRANCH=none

Signed-off-by: Jon Murphy <jpmurphy@google.com>
Change-Id: I034ab8a06842bee12060103b4a1bc4e3db69e42a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62145
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>

src/mainboard/google/skyrim/Kconfig

@@ -33,6 +33,14 @@ config MAINBOARD_FAMILY
 config MAINBOARD_PART_NUMBER
 	default "Skyrim" if BOARD_GOOGLE_SKYRIM
 
+config OVERRIDE_DEVICETREE
+	string
+	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
+
+config VARIANT_DIR
+	string
+	default "skyrim" if BOARD_GOOGLE_SKYRIM
+
 config VBOOT
 	select VBOOT_NO_BOARD_SUPPORT
 	select VBOOT_SEPARATE_VERSTAGE

src/mainboard/google/skyrim/Makefile.inc

@@ -8,5 +8,7 @@ ramstage-y += mainboard.c
 ramstage-$(CONFIG_CHROMEOS) += chromeos.c
 
 subdirs-y += variants/baseboard
+subdirs-y += variants/$(VARIANT_DIR)
 
 CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include
+CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include

src/mainboard/google/skyrim/mainboard.c

@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <baseboard/variants.h>
+#include <console/console.h>
 #include <device/device.h>
 
 static void mainboard_configure_gpios(void)
@@ -22,7 +23,7 @@ static void mainboard_init(void *chip_info)
 
 static void mainboard_enable(struct device *dev)
 {
-	/* TODO: Enable mainboard */
+	printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
 }
 
 struct chip_operations mainboard_ops = {

src/mainboard/google/skyrim/variants/skyrim/include/variant/ec.h

@@ -0,0 +1,3 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/ec.h>

src/mainboard/google/skyrim/variants/skyrim/overridetree.cb

@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+chip soc/amd/sabrina
+	device domain 0 on
+	end # domain
+end	# chip soc/amd/sabrina