back out immature amd8111_enable stuff
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1555 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -13,75 +13,12 @@ void amd8111_enable(device_t dev)
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uint16_t reg_old, reg;
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uint8_t byte;
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{
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uint16_t vendor, device;
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vendor = pci_read_config16(dev, PCI_VENDOR_ID);
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device = pci_read_config16(dev, PCI_DEVICE_ID);
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printk_debug("%s: %s %s [%x/%x]\n", __FUNCTION__,
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dev->enabled? "enabling" : "disabling", dev_path(dev),
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vendor, device);
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}
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/* See if we are on the behind the amd8111 pci bridge */
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bus_dev = dev->bus->dev;
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if ((bus_dev->vendor == PCI_VENDOR_ID_AMD) &&
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(bus_dev->device == PCI_DEVICE_ID_AMD_8111_PCI)) {
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unsigned devfn;
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devfn = bus_dev->path.u.pci.devfn + (1 << 3);
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// devnf = devfn + DEVFN(1,0);
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lpc_dev = dev_find_slot(bus_dev->bus->secondary, devfn);
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index = ((dev->path.u.pci.devfn & ~7) >> 3) + 8;
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} else {
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unsigned devfn;
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devfn = (dev->path.u.pci.devfn) & ~7;
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lpc_dev = dev_find_slot(dev->bus->secondary, devfn);
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index = dev->path.u.pci.devfn & 7;
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}
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if ((!lpc_dev) || (index >= 16)) {
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return;
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}
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if ((lpc_dev->vendor != PCI_VENDOR_ID_AMD) ||
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(lpc_dev->device != PCI_DEVICE_ID_AMD_8111_ISA)) {
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uint32_t id;
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id = pci_read_config32(lpc_dev, PCI_VENDOR_ID);
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if (id != (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8111_ISA << 16))) {
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return;
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}
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}
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reg = reg_old = pci_read_config16(lpc_dev, 0x48);
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reg &= ~(1 << index);
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if (dev->enabled) {
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reg |= (1 << index);
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}
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if (reg != reg_old) {
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pci_write_config16(lpc_dev, 0x48, reg);
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}
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}
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void amd8111_enable_dev(device_t dev)
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{
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device_t lpc_dev;
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device_t bus_dev;
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unsigned index;
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uint16_t reg_old, reg;
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{
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uint16_t vendor, device;
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vendor = pci_read_config16(dev, PCI_VENDOR_ID);
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device = pci_read_config16(dev, PCI_DEVICE_ID);
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printk_debug("%s: %s %s [%x/%x]\n", __FUNCTION__,
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dev->enabled? "enabling" : "disabling", dev_path(dev),
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vendor, device);
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}
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/* See if we are on the behind the amd8111 pci bridge */
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bus_dev = dev->bus->dev;
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if ((bus_dev->vendor == PCI_VENDOR_ID_AMD) &&
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(bus_dev->device == PCI_DEVICE_ID_AMD_8111_PCI)) {
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unsigned devfn;
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devfn = bus_dev->path.u.pci.devfn + (1 << 3);
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// devnf = devfn + DEVFN(1,0);
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lpc_dev = dev_find_slot(bus_dev->bus->secondary, devfn);
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index = ((dev->path.u.pci.devfn & ~7) >> 3) + 8;
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} else {
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@ -105,8 +42,7 @@ void amd8111_enable_dev(device_t dev)
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if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
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(dev->device == PCI_DEVICE_ID_AMD_8111_USB2)) {
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if (!dev->enabled) {
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uint8_t byte;
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if(!dev->enabled) {
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byte = pci_read_config8(lpc_dev, 0x47);
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byte |= (1<<7);
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pci_write_config8(lpc_dev, 0x47, byte);
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@ -128,5 +64,5 @@ void amd8111_enable_dev(device_t dev)
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struct chip_control southbridge_amd_amd8111_control = {
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.name = "AMD 8111 Southbridge",
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.enable_dev = amd8111_enable_dev,
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.enable_dev = amd8111_enable,
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};
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