From 9e23d017f555bad681c70f634bffd27c7ceccc2b Mon Sep 17 00:00:00 2001 From: Maulik V Vaghela Date: Wed, 9 Jun 2021 14:03:08 +0530 Subject: [PATCH] mb/google/brya: Update mainboard properties for BB retimer upgrade This changes updates mainboard properties by adding DFP number and power_gpio for each DFP. Reference CB:54292 BUG=b:186521258 TEST=Updated BB retimer FW from 3.4 to 3.5 without any device connected. Change-Id: I24a02fd446cb66bda9e66e59802b4deea6894273 Signed-off-by: Maulik V Vaghela Reviewed-on: https://review.coreboot.org/c/coreboot/+/55348 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak Reviewed-by: EricR Lai --- src/mainboard/google/brya/Kconfig | 1 + .../google/brya/variants/brya0/overridetree.cb | 16 ++++++++++++++++ 2 files changed, 17 insertions(+) diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index b863d8d1e6..7f38851d2b 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -8,6 +8,7 @@ config BOARD_GOOGLE_BASEBOARD_BRYA select DRIVERS_INTEL_DPTF select DRIVERS_INTEL_PMC select DRIVERS_INTEL_SOUNDWIRE + select DRIVERS_INTEL_USB4_RETIMER select DRIVERS_SOUNDWIRE_ALC5682 select DRIVERS_SOUNDWIRE_MAX98373 select DRIVERS_SPI_ACPI diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb index 81a4c34a59..3ba0abe9bb 100644 --- a/src/mainboard/google/brya/variants/brya0/overridetree.cb +++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb @@ -134,6 +134,22 @@ chip soc/intel/alderlake device ref pcie_rp6 on probe DB_LTE LTE_PCIE end + device ref tcss_dma0 on + chip drivers/intel/usb4/retimer + register "dfp" = "{ + [0] = {.power_gpio = ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4), + .group = ACPI_PLD_GROUP(1, 1),}}" + device generic 0 on end + end + end + device ref tcss_dma1 on + chip drivers/intel/usb4/retimer + register "dfp" = "{ + [0] = {.power_gpio = ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4), + .group = ACPI_PLD_GROUP(3, 1)}}" + device generic 0 on end + end + end device ref pcie_rp8 on chip soc/intel/common/block/pcie/rtd3 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"