mb/51nb/x210: Make use of the chipset devicetree
Use the references from the chipset devicetree as this makes the comments superfluous and remove devices which are turned off. Change-Id: I0f069f02e4f0957cbff05d1bc9aa499fb51b6a02 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78574 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
parent
447e27937c
commit
9e345c8400
|
@ -102,45 +102,25 @@ chip soc/intel/skylake
|
|||
|
||||
device cpu_cluster 0 on end
|
||||
device domain 0 on
|
||||
device pci 00.0 on end # Host Bridge
|
||||
device pci 02.0 on end # Integrated Graphics Device
|
||||
device pci 04.0 on end # SA thermal subsystem
|
||||
device pci 14.0 on end # USB xHCI
|
||||
device pci 14.1 off end # USB xDCI (OTG)
|
||||
device pci 14.2 on end # Thermal Subsystem
|
||||
device pci 14.3 off end # Camera
|
||||
device pci 16.0 on end # Management Engine Interface 1
|
||||
device pci 16.1 off end # Management Engine Interface 2
|
||||
device pci 16.2 off end # Management Engine IDE-R
|
||||
device pci 16.3 off end # Management Engine KT Redirection
|
||||
device pci 16.4 off end # Management Engine Interface 3
|
||||
device pci 17.0 on end # SATA
|
||||
device pci 1c.0 off end # PCI Express Port 1
|
||||
device pci 1c.1 off end # PCI Express Port 2
|
||||
device pci 1c.2 on end # PCI Express Port 3
|
||||
device pci 1c.3 on end # PCI Express Port 4
|
||||
device pci 1c.4 off end # PCI Express Port 5
|
||||
device pci 1c.5 off end # PCI Express Port 6
|
||||
device pci 1c.6 off end # PCI Express Port 7
|
||||
device pci 1c.7 off end # PCI Express Port 8
|
||||
device pci 1d.0 on end # PCI Express Port 9
|
||||
device pci 1d.1 off end # PCI Express Port 10
|
||||
device pci 1d.2 off end # PCI Express Port 11
|
||||
device pci 1d.3 off end # PCI Express Port 12
|
||||
device pci 1e.6 off end # SDXC
|
||||
device pci 1f.0 on
|
||||
device ref igpu on end
|
||||
device ref sa_thermal on end
|
||||
device ref south_xhci on end
|
||||
device ref thermal on end
|
||||
device ref heci1 on end
|
||||
device ref sata on end
|
||||
device ref pcie_rp3 on end
|
||||
device ref pcie_rp4 on end
|
||||
device ref pcie_rp9 on end
|
||||
device ref lpc_espi on
|
||||
chip ec/51nb/npce985la0dx
|
||||
device pnp 0c09.0 on end
|
||||
device pnp 4e.5 on end
|
||||
device pnp 4e.6 on end
|
||||
device pnp 4e.11 on end
|
||||
end
|
||||
end # LPC Interface
|
||||
device pci 1f.1 off end # P2SB
|
||||
device pci 1f.2 on end # Power Management Controller
|
||||
device pci 1f.3 on end # Intel HDA
|
||||
device pci 1f.4 on end # SMBus
|
||||
device pci 1f.5 off end # PCH SPI
|
||||
device pci 1f.6 off end # GbE
|
||||
end
|
||||
device ref pmc on end
|
||||
device ref hda on end
|
||||
device ref smbus on end
|
||||
end
|
||||
end
|
||||
|
|
Loading…
Reference in New Issue