mb/google/brask/variants/moli: set eMMC pin in bootblock

1.Assert eMMC enable pin in bootblock
2.Deassert eMMC reset pin in bootblock

BUG=b:220821454

Signed-off-by: Raihow Shi <raihow_shi@wistron.corp-partner.google.com>
Change-Id: I924fcdadaae8ed29b50369a55bad00983cf6ba19
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62770
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Raihow Shi 2022-03-14 11:06:35 +08:00 committed by Felix Held
parent 5fa28a5404
commit 9e4a38795c
1 changed files with 4 additions and 0 deletions

View File

@ -69,6 +69,8 @@ static const struct pad_config override_gpio_table[] = {
static const struct pad_config early_gpio_table[] = { static const struct pad_config early_gpio_table[] = {
/* A13 : PMC_I2C_SCL ==> GSC_PCH_INT_ODL */ /* A13 : PMC_I2C_SCL ==> GSC_PCH_INT_ODL */
PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT), PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT),
/* B3 : PROC_GP2 ==> EMMC_PERST_L */
PAD_CFG_GPO(GPP_B3, 0, DEEP),
/* B4 : PROC_GP3 ==> SSD_PERST_L */ /* B4 : PROC_GP3 ==> SSD_PERST_L */
PAD_CFG_GPO(GPP_B4, 0, DEEP), PAD_CFG_GPO(GPP_B4, 0, DEEP),
/* /*
@ -86,6 +88,8 @@ static const struct pad_config early_gpio_table[] = {
PAD_CFG_GPO(GPP_D18, 0, PLTRST), PAD_CFG_GPO(GPP_D18, 0, PLTRST),
/* E15 : RSVD_TP ==> PCH_WP_OD */ /* E15 : RSVD_TP ==> PCH_WP_OD */
PAD_CFG_GPI_GPIO_DRIVER(GPP_E15, NONE, DEEP), PAD_CFG_GPI_GPIO_DRIVER(GPP_E15, NONE, DEEP),
/* E20 : DDP2_CTRLCLK ==> EN_PP3300_EMMC */
PAD_CFG_GPO(GPP_E20, 1, DEEP),
/* F14 : GSXDIN ==> EN_PP3300_SSD */ /* F14 : GSXDIN ==> EN_PP3300_SSD */
PAD_CFG_GPO(GPP_F14, 1, DEEP), PAD_CFG_GPO(GPP_F14, 1, DEEP),
/* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */ /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */