gru: kevin: initialize cr50 SPI interface
Set up the pins and initialize the driver. BRANCH=none BUG=chrome-os-partner:50645, chrome-os-partner:51537 TEST=with the rest of the patches applied it is possible to communicate with the cr50. Change-Id: I9fc1cb84ccababa6f58b2d5beec4572dc1d79da1 Signed-off-by: Martin Roth <martinroth@chromium.org> Original-Commit-Id: 6100471db2a00fd411afc05d621429b8f8a2f81d Original-Change-Id: I0ccd8777288e35870658268813c9202dd850c70d Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/349852 Original-Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-on: https://review.coreboot.org/15296 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -64,9 +64,13 @@ void bootblock_mainboard_init(void)
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write32(&rk3399_pmugrf->spi1_csclktx, IOMUX_SPI1_CSCLKTX);
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rockchip_spi_init(CONFIG_BOOT_MEDIA_SPI_BUS, 24750*KHz);
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/* Set pinmux and configure EC flashrom. */
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/* Set pinmux and configure EC SPI. */
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write32(&rk3399_grf->iomux_spi5, IOMUX_SPI5);
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rockchip_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, 3093750);
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/* Set pinmux and configure TPM SPI, which is not very fast. */
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write32(&rk3399_grf->iomux_spi0, IOMUX_SPI0);
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rockchip_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, 1500*KHz);
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setup_chromeos_gpios();
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}
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