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tegra132: fix gpio constants 

I erroneously added GPIO_NONE_INDEX at the beginning of the
enum block effectively putting every GPIO index off by 1.
Instead, move it to the end.

BUG=chrome-os-partner:29981
BRANCH=None
TEST=Built and ran through to depthcharge on rush. Also
     printed out banks, port, and bit offsets to validate.

Change-Id: I4f6510c1b6fcdddddbe36ff738299b4439ffc597
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4c020c2125b9a2378a7faa17209d1b78e019c7df
Original-Change-Id: I0471480e8658de9e534beb859a1f5027a961d73e
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/210908
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/8907
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Aaron Durbin 2014-08-04 15:38:42 -05:00 committed by Patrick Georgi
parent bf53418099
commit 9e76090fe9
1 changed files with 2 additions and 2 deletions
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4
src/soc/nvidia/tegra132/pinmux.h
View File

@ -32,7 +32,6 @@
GPIO_##port##6_INDEX, GPIO_##port##7_INDEX GPIO_##port##6_INDEX, GPIO_##port##7_INDEX
enum { enum {
GPIO_NONE_INDEX = 0,
GPIO_PORT_CONSTANTS(A), GPIO_PORT_CONSTANTS(A),
GPIO_PORT_CONSTANTS(B), GPIO_PORT_CONSTANTS(B),
GPIO_PORT_CONSTANTS(C), GPIO_PORT_CONSTANTS(C),
@ -64,7 +63,8 @@ enum {
GPIO_PORT_CONSTANTS(CC), GPIO_PORT_CONSTANTS(CC),
GPIO_PORT_CONSTANTS(DD), GPIO_PORT_CONSTANTS(DD),
GPIO_PORT_CONSTANTS(EE), GPIO_PORT_CONSTANTS(EE),
GPIO_PORT_CONSTANTS(FF) GPIO_PORT_CONSTANTS(FF),
GPIO_NONE_INDEX = 0,
}; };
#define PINMUX_CONSTANTS_GPIO(name, gpio) \ #define PINMUX_CONSTANTS_GPIO(name, gpio) \