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amdfam10 boards: Drop AMD_SB_CIMX 

Copy-paste, boards do not set this.

Change-Id: I4c0795a483948b1e357388a5ad639c3f1950bbc8
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30625
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Kyösti Mälkki 2019-01-03 11:38:27 +02:00
parent 031dc67a61
commit 9e7ac6b034
5 changed files with 0 additions and 31 deletions
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7
src/mainboard/advansus/a785e-i/get_bus_conf.c
View File

@ -19,9 +19,6 @@
#include <stdlib.h>
#include <cpu/amd/multicore.h>
#include <cpu/amd/amdfam10_sysconf.h>
#if IS_ENABLED(CONFIG_AMD_SB_CIMX)
#include <sb_cimx.h>
#endif
/* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default.
@ -125,8 +122,4 @@ void get_bus_conf(void)
else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
apicid_sb800 = apicid_base + 0;
#if IS_ENABLED(CONFIG_AMD_SB_CIMX)
sb_Late_Post();
#endif
}

7
src/mainboard/asus/m5a88-v/get_bus_conf.c
View File

@ -19,9 +19,6 @@
#include <stdlib.h>
#include <cpu/amd/multicore.h>
#include <cpu/amd/amdfam10_sysconf.h>
#if IS_ENABLED(CONFIG_AMD_SB_CIMX)
#include <sb_cimx.h>
#endif
/* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default.
@ -125,8 +122,4 @@ void get_bus_conf(void)
else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
apicid_sb800 = apicid_base + 0;
#if IS_ENABLED(CONFIG_AMD_SB_CIMX)
sb_Late_Post();
#endif
}

7
src/mainboard/avalue/eax-785e/get_bus_conf.c
View File

@ -19,9 +19,6 @@
#include <stdlib.h>
#include <cpu/amd/multicore.h>
#include <cpu/amd/amdfam10_sysconf.h>
#if IS_ENABLED(CONFIG_AMD_SB_CIMX)
#include <sb_cimx.h>
#endif
/* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default.
@ -125,8 +122,4 @@ void get_bus_conf(void)
else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
apicid_sb800 = apicid_base + 0;
#if IS_ENABLED(CONFIG_AMD_SB_CIMX)
sb_Late_Post();
#endif
}

8
src/northbridge/amd/amdfam10/northbridge.c
View File

@ -49,10 +49,6 @@
#include <cpu/amd/model_10xxx_rev.h>
#endif
#if IS_ENABLED(CONFIG_AMD_SB_CIMX)
#include <sb_cimx.h>
#endif
#if IS_ENABLED(CONFIG_DIMM_DDR3)
#include "../amdmct/mct_ddr3/s3utils.h"
#endif
@ -1948,10 +1944,6 @@ static void cpu_bus_init(struct device *dev)
detect_and_enable_probe_filter(dev);
detect_and_enable_cache_partitioning(dev);
initialize_cpus(dev->link_list);
#if IS_ENABLED(CONFIG_AMD_SB_CIMX)
sb_After_Pci_Init();
sb_Mid_Post_Init();
#endif
}
static struct device_operations cpu_bus_ops = {

2
src/southbridge/amd/rs780/rs780.c
View File

@ -349,7 +349,6 @@ void rs780_enable(struct device *dev)
}
}
#if !IS_ENABLED(CONFIG_AMD_SB_CIMX)
unsigned long acpi_fill_mcfg(unsigned long current)
{
/* FIXME
@ -358,7 +357,6 @@ unsigned long acpi_fill_mcfg(unsigned long current)
*/
return current;
}
#endif
struct chip_operations southbridge_amd_rs780_ops = {
CHIP_NAME("ATI RS780")