diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc index 75ef33fa02..ce1dd9cbf6 100644 --- a/src/soc/intel/broadwell/Makefile.inc +++ b/src/soc/intel/broadwell/Makefile.inc @@ -19,8 +19,6 @@ bootblock-y += ../../../cpu/x86/early_reset.S ramstage-y += acpi.c ramstage-y += cpu.c -ramstage-y += cpu_info.c -smm-y += cpu_info.c ramstage-y += finalize.c ramstage-y += gma.c ramstage-y += memmap.c diff --git a/src/soc/intel/broadwell/cpu_info.c b/src/soc/intel/broadwell/cpu_info.c deleted file mode 100644 index 8814a480e5..0000000000 --- a/src/soc/intel/broadwell/cpu_info.c +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include -#include -#include -#include - -/* Dynamically determine if the part is ULT. */ -int cpu_is_ult(void) -{ - static int ult = -1; - - if (ult < 0) { - u32 fm = cpu_family_model(); - if (fm == BROADWELL_FAMILY_ULT || fm == HASWELL_FAMILY_ULT) - ult = 1; - else - ult = 0; - } - - return ult; -} diff --git a/src/soc/intel/broadwell/gma.c b/src/soc/intel/broadwell/gma.c index c77f5c4476..3889be3513 100644 --- a/src/soc/intel/broadwell/gma.c +++ b/src/soc/intel/broadwell/gma.c @@ -364,6 +364,7 @@ static int igd_get_cdclk_haswell(u32 *const cdsel, int *const inform_pc, /* Check for ULX GT1 or GT2 */ const int devid = pci_read_config16(dev, PCI_DEVICE_ID); + const int cpu_is_ult = cpu_family_model() == HASWELL_FAMILY_ULT; const int gpu_is_ulx = devid == IGD_HASWELL_ULX_GT1 || devid == IGD_HASWELL_ULX_GT2; @@ -378,7 +379,7 @@ static int igd_get_cdclk_haswell(u32 *const cdsel, int *const inform_pc, */ if (gpu_is_ulx && cdclk <= GT_CDCLK_337) cdclk = GT_CDCLK_337; - else if (gpu_is_ulx || cpu_is_ult() || + else if (gpu_is_ulx || cpu_is_ult || cdclk == GT_CDCLK_337 || cdclk == GT_CDCLK_450) cdclk = GT_CDCLK_450; else @@ -398,6 +399,7 @@ static int igd_get_cdclk_broadwell(u32 *const cdsel, int *const inform_pc, /* Check for ULX */ const int devid = pci_read_config16(dev, PCI_DEVICE_ID); + const int cpu_is_ult = cpu_family_model() == BROADWELL_FAMILY_ULT; const int gpu_is_ulx = devid == IGD_BROADWELL_Y_GT2; /* Inform power controller of upcoming frequency change */ @@ -428,7 +430,7 @@ static int igd_get_cdclk_broadwell(u32 *const cdsel, int *const inform_pc, (gpu_is_ulx && cdclk == GT_CDCLK_DEFAULT)) cdclk = GT_CDCLK_450; else if (cdclk == GT_CDCLK_540 || gpu_is_ulx || - (cpu_is_ult() && cdclk == GT_CDCLK_DEFAULT)) + (cpu_is_ult && cdclk == GT_CDCLK_DEFAULT)) cdclk = GT_CDCLK_540; else cdclk = GT_CDCLK_675; diff --git a/src/soc/intel/broadwell/include/soc/cpu.h b/src/soc/intel/broadwell/include/soc/cpu.h index b8ef761e38..bc5d2d76bd 100644 --- a/src/soc/intel/broadwell/include/soc/cpu.h +++ b/src/soc/intel/broadwell/include/soc/cpu.h @@ -54,6 +54,4 @@ static inline u32 cpu_stepping(void) return cpuid_eax(1) & 0xf; } -int cpu_is_ult(void); - #endif