ec/google/chromeec: Introduce SKU_ID helpers
The following introduces helpers that, by default, accommodate a larger SKU id space. The following is the rational for that: Allow INT32_MAX SKU id encodings beyond UINT8_MAX. This allows for the SKU id to accommodate up to 4 bytes however we reserve the highest bit for SKU_UNKNOWN to be encoded. However, the legacy UINT8_MAX encoding is supported by leveraging the Kconfig by overriding it with the legacy max of 0xff. Follow ups migrate boards to this common framework. V.2: Fixup array size && drop sku_id SKU_UNKNOWN check and pass whatever is set to userspace as firmware doesn't care about the value. V.3: Use SPDX-License header. BUG=b:149348474 BRANCH=none TEST=tested on hatch. Change-Id: I805b25465a3b4ee3dc0cbda5feb9e9ea2493ff9e Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39018 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -100,6 +100,11 @@ config EC_GOOGLE_CHROMEEC_SPI_CHIP
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hex
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default 0x0
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config EC_GOOGLE_CHROMEEC_SKUID
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def_bool n
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help
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Provides common routine for reporting the skuid to ChromeOS.
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config EC_GOOGLE_CHROMEEC_BOARDNAME
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depends on EC_GOOGLE_CHROMEEC
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string "Chrome EC board name for EC"
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@ -6,6 +6,9 @@ romstage-$(CONFIG_EC_GOOGLE_CHROMEEC_BOARDID) += ec_boardid.c
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ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC_BOARDID) += ec_boardid.c
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smm-$(CONFIG_EC_GOOGLE_CHROMEEC_BOARDID) += ec_boardid.c
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romstage-$(CONFIG_EC_GOOGLE_CHROMEEC_SKUID) += ec_skuid.c
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ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC_SKUID) += ec_skuid.c
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bootblock-y += ec.c
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bootblock-$(CONFIG_EC_GOOGLE_CHROMEEC_LPC) += ec_lpc.c
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ramstage-y += ec.c crosec_proto.c vstore.c
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@ -89,6 +89,9 @@ int google_chromeec_cbi_get_fw_config(uint32_t *fw_config);
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int google_chromeec_cbi_get_dram_part_num(char *buf, size_t bufsize);
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int google_chromeec_cbi_get_oem_name(char *buf, size_t bufsize);
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uint32_t google_chromeec_get_board_sku(void);
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const char *google_chromeec_smbios_system_sku(void);
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/* MEC uses 0x800/0x804 as register/index pair, thus an 8-byte resource. */
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#define MEC_EMI_BASE 0x800
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#define MEC_EMI_SIZE 8
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@ -0,0 +1,36 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2020 The coreboot project Authors.
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include <stddef.h>
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#include <boardid.h>
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#include <ec/google/chromeec/ec.h>
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#include <console/console.h>
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#include <string.h>
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#define SKU_UNKNOWN 0xFFFFFFFF
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uint32_t google_chromeec_get_board_sku(void)
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{
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MAYBE_STATIC_NONZERO uint32_t sku_id = SKU_UNKNOWN;
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if (sku_id != SKU_UNKNOWN)
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return sku_id;
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if (google_chromeec_cbi_get_sku_id(&sku_id))
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sku_id = SKU_UNKNOWN;
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return sku_id;
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}
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const char *google_chromeec_smbios_system_sku(void)
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{
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static char sku_str[14]; /* sku{0..2147483647} */
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uint32_t sku_id = google_chromeec_get_board_sku();
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snprintf(sku_str, sizeof(sku_str), "sku%u", sku_id);
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return sku_str;
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}
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