mb/intel/jasperlake_rvp: Correct Kconfig options
1.Select CHROMEOS_EC related Kconfig for variant board with external EC support. 2.Select proper CHROMEOS Kconfigs which are required for all variants. 3.Disable Intel EC region in case of external EC. BUG=None BRANCH=None TEST=Compilation is successful for both Jasper Lake RVP variants. Change-Id: I290b3748777e18476651101de71df9080dd3105c Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39584 Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -10,9 +10,7 @@ config BOARD_SPECIFIC_OPTIONS
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select GENERIC_SPD_BIN
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select HAVE_ACPI_RESUME
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select HAVE_ACPI_TABLES
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select INTEL_LPSS_UART_FOR_CONSOLE
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select MAINBOARD_HAS_CHROMEOS
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select MAINBOARD_USES_IFD_EC_REGION
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select SOC_INTEL_JASPERLAKE
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config MAINBOARD_DIR
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@ -43,11 +41,24 @@ config DIMM_SPD_SIZE
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int
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default 512
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config CHROMEOS
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bool
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default y
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select GBB_FLAG_FORCE_DEV_SWITCH_ON
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select GBB_FLAG_FORCE_DEV_BOOT_USB
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select GBB_FLAG_FORCE_DEV_BOOT_LEGACY
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select GBB_FLAG_FORCE_MANUAL_RECOVERY
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select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC
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select HAS_RECOVERY_MRC_CACHE
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select MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN
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config VBOOT
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select VBOOT_LID_SWITCH
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select VBOOT_MOCK_SECDATA
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select VBOOT_MOCK_SECDATA if !MAINBOARD_HAS_TPM2
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config UART_FOR_CONSOLE
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int
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default 2
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default 2 if INTEL_LPSS_UART_FOR_CONSOLE
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default 0
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endif
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@ -1,5 +1,11 @@
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config BOARD_INTEL_JASPERLAKE_RVP
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bool "Jasperlake DDR4/LPDDR4 RVP"
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select DRIVERS_UART_8250IO
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select MAINBOARD_USES_IFD_EC_REGION
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config BOARD_INTEL_JASPERLAKE_RVP_EXT_EC
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bool "Jasperlake DDR4/LPDDR4 RVP with Chrome EC"
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC_LPC
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select EC_GOOGLE_CHROMEEC_SWITCHES
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select INTEL_LPSS_UART_FOR_CONSOLE
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