diff --git a/src/northbridge/intel/haswell/acpi/ctdp.asl b/src/northbridge/intel/haswell/acpi/ctdp.asl
index bc43a81e87..89669b3661 100644
--- a/src/northbridge/intel/haswell/acpi/ctdp.asl
+++ b/src/northbridge/intel/haswell/acpi/ctdp.asl
@@ -66,7 +66,7 @@ Scope (\_SB.PCI0.MCHC)
 
 		While (Local0 < Local1) {
 			/* Store _PSS entry Control value to Local2 */
-			Local2 = DeRefOf (Index (DeRefOf (Index (\_SB.CP00._PSS, Local0)), 4)) >> 8
+			Local2 = DeRefOf (DeRefOf (\_SB.CP00._PSS[Local0])[4]) >> 8
 			If (Local2 == Arg0) {
 				Return (Local0 - 1)
 			}