bootstate: use structure pointers for scheduling callbacks
The GCC 4.9.2 update showed that the boot_state_init_entry structures were being padded and assumed to be aligned in to an increased size. The bootstate scheduler for static entries, boot_state_schedule_static_entries(), was then calculating the wrong values within the array. To fix this just use a pointer to the boot_state_init_entry structure that needs to be scheduled. In addition to the previous issue noted above, the .bs_init section was sitting in the read only portion of the image while the fields within it need to be writable. Also, the boot_state_schedule_static_entries() was using symbol comparison to terminate a loop which in C can lead the compiler to always evaluate the loop at least once since the language spec indicates no 2 symbols can be the same value. Change-Id: I6dc5331c2979d508dde3cd5c3332903d40d8048b Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8699 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
parent
b335c3de42
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9ef9d85976
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@ -64,6 +64,7 @@ SECTIONS
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ecpu_drivers = . ;
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_bs_init_begin = .;
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KEEP(*(.bs_init));
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LONG(0);
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_bs_init_end = .;
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*(.rodata)
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*(.rodata.*)
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@ -69,6 +69,8 @@ SECTIONS
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ecpu_drivers = . ;
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_bs_init_begin = .;
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KEEP(*(.bs_init));
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LONG(0);
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LONG(0);
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_bs_init_end = .;
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*(.rodata)
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*(.rodata.*)
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@ -69,6 +69,7 @@ SECTIONS
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ecpu_drivers = . ;
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_bs_init_begin = .;
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*(.bs_init)
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LONG(0);
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_bs_init_end = .;
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*(.rodata)
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*(.rodata.*)
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@ -62,6 +62,7 @@ SECTIONS
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ecpu_drivers = . ;
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_bs_init_begin = .;
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KEEP(*(.bs_init));
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LONG(0);
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_bs_init_end = .;
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*(.rodata)
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@ -42,7 +42,5 @@ static void agesawrapper_post_device(void *unused)
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agesawrapper_amdS3Save();
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}
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BOOT_STATE_INIT_ENTRIES(agesa_bscb) = {
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BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT,
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agesawrapper_post_device, NULL),
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};
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BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT,
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agesawrapper_post_device, NULL);
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@ -40,7 +40,5 @@ static void agesawrapper_post_device(void *unused)
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AGESAWRAPPER(amdS3Save);
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}
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BOOT_STATE_INIT_ENTRIES(agesa_bscb) = {
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BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT,
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agesawrapper_post_device, NULL),
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};
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BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT,
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agesawrapper_post_device, NULL);
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@ -318,8 +318,6 @@ static void find_fsp_hob_update_mrc(void *unused)
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}
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/* Update the MRC/fast boot cache as part of the late table writing stage */
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BOOT_STATE_INIT_ENTRIES(fsp_hob_find) = {
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BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY,
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find_fsp_hob_update_mrc, NULL),
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};
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BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY,
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find_fsp_hob_update_mrc, NULL);
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#endif /* #ifndef __PRE_RAM__ */
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@ -22,6 +22,9 @@
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#if !defined(__SMM__) && !defined(__PRE_RAM__)
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#include <string.h>
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#include <stdlib.h>
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#include <stddef.h>
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#include <stdint.h>
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/* Control debugging of the boot state machine. */
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#define BOOT_STATE_DEBUG 0
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@ -157,6 +160,10 @@ int boot_state_sched_on_entry(struct boot_state_callback *bscb,
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boot_state_t state);
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int boot_state_sched_on_exit(struct boot_state_callback *bscb,
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boot_state_t state);
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/* Schedule an array of entries of size num. */
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struct boot_state_init_entry;
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void boot_state_sched_entries(struct boot_state_init_entry *entries,
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size_t num);
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/* Block/Unblock the (state, seq) pair from transitioning. Returns 0 on
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* success < 0 when the phase of the (state,seq) has already ran. */
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@ -180,15 +187,16 @@ struct boot_state_init_entry {
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#define BOOT_STATE_INIT_ATTR __attribute__ ((used,section (".bs_init")))
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#define BOOT_STATE_INIT_ENTRIES(name_) \
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static struct boot_state_init_entry name_[] BOOT_STATE_INIT_ATTR
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#define BOOT_STATE_INIT_ENTRY(state_, when_, func_, arg_) \
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{ \
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.state = state_, \
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.when = when_, \
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.bscb = BOOT_STATE_CALLBACK_INIT(func_, arg_), \
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}
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#define BOOT_STATE_INIT_ENTRY(state_, when_, func_, arg_) \
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static struct boot_state_init_entry func_ ##_## state_ ##_## when_ = \
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{ \
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.state = state_, \
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.when = when_, \
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.bscb = BOOT_STATE_CALLBACK_INIT(func_, arg_), \
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}; \
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static struct boot_state_init_entry * \
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bsie_ ## func_ ##_## state_ ##_## when_ BOOT_STATE_INIT_ATTR = \
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& func_ ##_## state_ ##_## when_;
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#endif
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#endif /* BOOTSTATE_H */
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@ -435,11 +435,7 @@ static void init_cbmem_pre_device(void *unused)
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cbmem_initialize();
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}
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BOOT_STATE_INIT_ENTRIES(cbmem_bscb) = {
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BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY,
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init_cbmem_pre_device, NULL),
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};
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BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, init_cbmem_pre_device, NULL);
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#else
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static void init_cbmem_post_device(void *unused)
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@ -450,10 +446,8 @@ static void init_cbmem_post_device(void *unused)
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cbmem_initialize_empty();
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}
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BOOT_STATE_INIT_ENTRIES(cbmem_bscb) = {
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BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_ENTRY,
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init_cbmem_post_device, NULL),
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};
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BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_ENTRY,
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init_cbmem_post_device, NULL);
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#endif
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void cbmem_add_bootmem(void)
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@ -150,8 +150,6 @@ static void coverage_exit(void *unused)
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__gcov_flush();
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}
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BOOT_STATE_INIT_ENTRIES(gcov_bscb) = {
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BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, coverage_init, NULL),
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BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, coverage_exit, NULL),
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BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, coverage_exit, NULL),
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};
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BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, coverage_init, NULL);
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BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, coverage_exit, NULL);
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BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, coverage_exit, NULL);
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@ -432,18 +432,16 @@ int boot_state_sched_on_exit(struct boot_state_callback *bscb,
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static void boot_state_schedule_static_entries(void)
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{
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extern struct boot_state_init_entry _bs_init_begin;
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extern struct boot_state_init_entry _bs_init_end;
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struct boot_state_init_entry *cur;
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extern struct boot_state_init_entry *_bs_init_begin[];
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struct boot_state_init_entry **slot;
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cur = &_bs_init_begin;
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for (slot = &_bs_init_begin[0]; *slot != NULL; slot++) {
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struct boot_state_init_entry *cur = *slot;
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while (cur != &_bs_init_end) {
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if (cur->when == BS_ON_ENTRY)
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boot_state_sched_on_entry(&cur->bscb, cur->state);
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else
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boot_state_sched_on_exit(&cur->bscb, cur->state);
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cur++;
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}
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}
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@ -49,6 +49,8 @@ SECTIONS
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. = ALIGN(8);
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_bs_init_begin = .;
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KEEP(*(.bs_init));
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LONG(0);
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LONG(0);
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_bs_init_end = .;
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. = ALIGN(8);
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@ -182,6 +182,4 @@ static void edp_vdden_cb(void *unused)
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ncore_select_func(SOC_DDI1_VDDEN_PAD, PAD_FUNC2);
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}
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BOOT_STATE_INIT_ENTRIES(edp_vdden_bscb) = {
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BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, edp_vdden_cb, NULL),
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};
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BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, edp_vdden_cb, NULL);
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@ -222,10 +222,7 @@ static void update_mrc_cache(void *unused)
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current->mrc_data_size + sizeof(*current), current);
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}
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BOOT_STATE_INIT_ENTRIES(mrc_cache_update) = {
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BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY,
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update_mrc_cache, NULL),
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};
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BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, update_mrc_cache, NULL);
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#endif
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struct mrc_data_container *find_current_mrc_cache(void)
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@ -223,10 +223,7 @@ static void update_mrc_cache(void *unused)
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current->mrc_data_size + sizeof(*current), current);
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}
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BOOT_STATE_INIT_ENTRIES(mrc_cache_update) = {
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BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY,
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update_mrc_cache, NULL),
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};
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BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, update_mrc_cache, NULL);
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#endif
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struct mrc_data_container *find_current_mrc_cache(void)
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@ -49,6 +49,4 @@ static void dptf_init(void *unused)
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reg_script_run(dptf_init_settings);
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}
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BOOT_STATE_INIT_ENTRIES(dptf_init_bscb) = {
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BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, dptf_init, NULL),
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};
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BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, dptf_init, NULL);
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@ -288,7 +288,5 @@ static void perf_power(void *unused)
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reg_script_run(perf_power_settings);
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}
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BOOT_STATE_INIT_ENTRIES(disable_rom_cache_bscb) = {
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BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, perf_power, NULL),
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BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, perf_power, NULL),
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};
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BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, perf_power, NULL);
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BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, perf_power, NULL);
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@ -568,9 +568,5 @@ static void finalize_chipset(void *unused)
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outb(APM_CNT_FINALIZE, APM_CNT);
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}
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BOOT_STATE_INIT_ENTRIES(finalize_bscb) = {
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BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY,
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finalize_chipset, NULL),
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BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT,
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finalize_chipset, NULL),
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};
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BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, finalize_chipset, NULL);
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BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, finalize_chipset, NULL);
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@ -323,9 +323,7 @@ static void spi_init_cb(void *unused)
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spi_init();
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}
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BOOT_STATE_INIT_ENTRIES(spi_init_bscb) = {
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BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL),
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};
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BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL);
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#endif
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int spi_claim_bus(struct spi_slave *slave)
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@ -133,6 +133,4 @@ static void pch_log_state(void *unused)
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pch_log_wake_source(ps);
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}
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BOOT_STATE_INIT_ENTRIES(pch_log) = {
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BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, pch_log_state, NULL)
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};
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BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, pch_log_state, NULL);
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@ -119,9 +119,5 @@ static void broadwell_finalize(void *unused)
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post_code(POST_OS_BOOT);
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}
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BOOT_STATE_INIT_ENTRIES(finalize) = {
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BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY,
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broadwell_finalize, NULL),
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BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT,
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broadwell_finalize, NULL),
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};
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BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, broadwell_finalize, NULL);
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BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, broadwell_finalize, NULL);
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@ -315,9 +315,7 @@ static void spi_init_cb(void *unused)
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spi_init();
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}
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BOOT_STATE_INIT_ENTRIES(spi_init_bscb) = {
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BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL),
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};
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BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL);
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int spi_claim_bus(struct spi_slave *slave)
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{
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@ -303,9 +303,6 @@ static void update_mrc_cache(void *unused)
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}
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}
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BOOT_STATE_INIT_ENTRIES(mrc_cache_update) = {
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BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY,
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update_mrc_cache, NULL),
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};
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BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, update_mrc_cache, NULL);
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#endif /* defined(__PRE_RAM__) */
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@ -45,10 +45,7 @@ static void set_pci_irqs(void *unused)
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* Hook this function into the PCI state machine
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* on entry into BS_DEV_ENABLE.
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*/
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BOOT_STATE_INIT_ENTRIES(pci_irq_update) = {
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BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY,
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set_pci_irqs, NULL),
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};
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BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, set_pci_irqs, NULL);
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static struct pci_operations lops_pci = {
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.set_subsystem = 0,
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@ -326,10 +326,7 @@ static void set_pci_irqs(void *unused)
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* Hook this function into the PCI state machine
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* on entry into BS_DEV_ENABLE.
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*/
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BOOT_STATE_INIT_ENTRIES(pci_irq_update) = {
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BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY,
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set_pci_irqs, NULL),
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};
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BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, set_pci_irqs, NULL);
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/**
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* @brief SB Cimx entry point sbBeforePciInit wrapper
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@ -48,10 +48,7 @@ static void set_pci_irqs(void *unused)
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* Hook this function into the PCI state machine
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* on entry into BS_DEV_ENABLE.
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*/
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BOOT_STATE_INIT_ENTRIES(pci_irq_update) = {
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BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY,
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set_pci_irqs, NULL),
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};
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BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, set_pci_irqs, NULL);
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static struct pci_operations lops_pci = {
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.set_subsystem = 0,
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@ -366,9 +366,7 @@ static void spi_init_cb(void *unused)
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spi_init();
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}
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BOOT_STATE_INIT_ENTRIES(spi_init_bscb) = {
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BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL),
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};
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BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL);
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#endif
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int spi_claim_bus(struct spi_slave *slave)
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@ -135,9 +135,6 @@ static void finalize_boot(void *unused)
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outb(0xcb, 0xb2);
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}
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BOOT_STATE_INIT_ENTRIES(finalize) = {
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BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY,
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finalize_boot, NULL),
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};
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BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, finalize_boot, NULL);
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#endif
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