bootstate: use structure pointers for scheduling callbacks

The GCC 4.9.2 update showed that the boot_state_init_entry
structures were being padded and assumed to be aligned in to an
increased size. The bootstate scheduler for static entries,
boot_state_schedule_static_entries(), was then calculating the
wrong values within the array. To fix this just use a pointer to
the boot_state_init_entry structure that needs to be scheduled.

In addition to the previous issue noted above, the .bs_init
section was sitting in the read only portion of the image while
the fields within it need to be writable. Also, the
boot_state_schedule_static_entries() was using symbol comparison
to terminate a loop which in C can lead the compiler to always
evaluate the loop at least once since the language spec indicates
no 2 symbols can be the same value.

Change-Id: I6dc5331c2979d508dde3cd5c3332903d40d8048b
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/8699
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

src/arch/arm/ramstage.ld

@@ -64,6 +64,7 @@ SECTIONS
 		ecpu_drivers = . ;
 		_bs_init_begin = .;
 		KEEP(*(.bs_init));
+		LONG(0);
 		_bs_init_end = .;
 		*(.rodata)
 		*(.rodata.*)

src/arch/arm64/ramstage.ld

@@ -69,6 +69,8 @@ SECTIONS
 		ecpu_drivers = . ;
 		_bs_init_begin = .;
 		KEEP(*(.bs_init));
+		LONG(0);
+		LONG(0);
 		_bs_init_end = .;
 		*(.rodata)
 		*(.rodata.*)

src/arch/riscv/ramstage.ld

@@ -69,6 +69,7 @@ SECTIONS
 		ecpu_drivers = . ;
 		_bs_init_begin = .;
 		*(.bs_init)
+		LONG(0);
 		_bs_init_end = .;
 		*(.rodata)
 		*(.rodata.*)

src/arch/x86/ramstage.ld

@@ -62,6 +62,7 @@ SECTIONS
 		ecpu_drivers = . ;
 		_bs_init_begin = .;
 		KEEP(*(.bs_init));
+		LONG(0);
 		_bs_init_end = .;
 
 		*(.rodata)

src/cpu/amd/agesa/amd_late_init.c

@@ -42,7 +42,5 @@ static void agesawrapper_post_device(void *unused)
 	agesawrapper_amdS3Save();
 }
 
-BOOT_STATE_INIT_ENTRIES(agesa_bscb) = {
 BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT,
-	                      agesawrapper_post_device, NULL),
-};
+			agesawrapper_post_device, NULL);

src/cpu/amd/pi/amd_late_init.c

@@ -40,7 +40,5 @@ static void agesawrapper_post_device(void *unused)
 	AGESAWRAPPER(amdS3Save);
 }
 
-BOOT_STATE_INIT_ENTRIES(agesa_bscb) = {
 BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT,
-	                      agesawrapper_post_device, NULL),
-};
+			agesawrapper_post_device, NULL);

src/drivers/intel/fsp/fsp_util.c

@@ -318,8 +318,6 @@ static void find_fsp_hob_update_mrc(void *unused)
 }
 
 /* Update the MRC/fast boot cache as part of the late table writing stage */
-BOOT_STATE_INIT_ENTRIES(fsp_hob_find) = {
 BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY,
-	                      find_fsp_hob_update_mrc, NULL),
-};
+			find_fsp_hob_update_mrc, NULL);
 #endif	/* #ifndef __PRE_RAM__ */

src/include/bootstate.h

@@ -22,6 +22,9 @@
 #if !defined(__SMM__) && !defined(__PRE_RAM__)
 
 #include <string.h>
+#include <stdlib.h>
+#include <stddef.h>
+#include <stdint.h>
 
 /* Control debugging of the boot state machine. */
 #define BOOT_STATE_DEBUG 0
@@ -157,6 +160,10 @@ int boot_state_sched_on_entry(struct boot_state_callback *bscb,
                               boot_state_t state);
 int boot_state_sched_on_exit(struct boot_state_callback *bscb,
                              boot_state_t state);
+/* Schedule an array of entries of size num. */
+struct boot_state_init_entry;
+void boot_state_sched_entries(struct boot_state_init_entry *entries,
+				size_t num);
 
 /* Block/Unblock the (state, seq) pair from transitioning. Returns 0 on
  * success < 0  when the phase of the (state,seq) has already ran. */
@@ -180,15 +187,16 @@ struct boot_state_init_entry {
 
 #define BOOT_STATE_INIT_ATTR  __attribute__ ((used,section (".bs_init")))
 
-#define BOOT_STATE_INIT_ENTRIES(name_) \
-	static struct boot_state_init_entry name_[] BOOT_STATE_INIT_ATTR
-
 #define BOOT_STATE_INIT_ENTRY(state_, when_, func_, arg_)		\
+	static struct boot_state_init_entry func_ ##_## state_ ##_## when_ = \
 	{								\
 		.state = state_,					\
 		.when = when_,						\
 		.bscb = BOOT_STATE_CALLBACK_INIT(func_, arg_),		\
-	}
+	};								\
+	static struct boot_state_init_entry *				\
+		bsie_ ## func_ ##_## state_ ##_## when_ BOOT_STATE_INIT_ATTR = \
+		& func_ ##_## state_ ##_## when_;
 
 #endif
 #endif /* BOOTSTATE_H */

src/lib/dynamic_cbmem.c

@@ -435,11 +435,7 @@ static void init_cbmem_pre_device(void *unused)
 	cbmem_initialize();
 }
 
-BOOT_STATE_INIT_ENTRIES(cbmem_bscb) = {
-	BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY,
-	                      init_cbmem_pre_device, NULL),
-};
-
+BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, init_cbmem_pre_device, NULL);
 #else
 
 static void init_cbmem_post_device(void *unused)
@@ -450,10 +446,8 @@ static void init_cbmem_post_device(void *unused)
 		cbmem_initialize_empty();
 }
 
-BOOT_STATE_INIT_ENTRIES(cbmem_bscb) = {
 BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_ENTRY,
-	                      init_cbmem_post_device, NULL),
-};
+			init_cbmem_post_device, NULL);
 #endif
 
 void cbmem_add_bootmem(void)

src/lib/gcov-glue.c

@@ -150,8 +150,6 @@ static void coverage_exit(void *unused)
 	__gcov_flush();
 }
 
-BOOT_STATE_INIT_ENTRIES(gcov_bscb) = {
-	BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, coverage_init, NULL),
-	BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, coverage_exit, NULL),
-	BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, coverage_exit, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, coverage_init, NULL);
+BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, coverage_exit, NULL);
+BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, coverage_exit, NULL);

src/lib/hardwaremain.c

@@ -432,18 +432,16 @@ int boot_state_sched_on_exit(struct boot_state_callback *bscb,
 
 static void boot_state_schedule_static_entries(void)
 {
-	extern struct boot_state_init_entry _bs_init_begin;
-	extern struct boot_state_init_entry _bs_init_end;
-	struct boot_state_init_entry *cur;
+	extern struct boot_state_init_entry *_bs_init_begin[];
+	struct boot_state_init_entry **slot;
 
-	cur = &_bs_init_begin;
+	for (slot = &_bs_init_begin[0]; *slot != NULL; slot++) {
+		struct boot_state_init_entry *cur = *slot;
 
-	while (cur != &_bs_init_end) {
 		if (cur->when == BS_ON_ENTRY)
 			boot_state_sched_on_entry(&cur->bscb, cur->state);
 		else
 			boot_state_sched_on_exit(&cur->bscb, cur->state);
-		cur++;
 	}
 }
 

src/lib/rmodule.ld

@@ -49,6 +49,8 @@ SECTIONS
 		. = ALIGN(8);
 		_bs_init_begin = .;
 		KEEP(*(.bs_init));
+		LONG(0);
+		LONG(0);
 		_bs_init_end = .;
 
 		. = ALIGN(8);

src/mainboard/google/rambi/mainboard.c

@@ -182,6 +182,4 @@ static void edp_vdden_cb(void *unused)
 	ncore_select_func(SOC_DDI1_VDDEN_PAD, PAD_FUNC2);
 }
 
-BOOT_STATE_INIT_ENTRIES(edp_vdden_bscb) = {
-	BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, edp_vdden_cb, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, edp_vdden_cb, NULL);

src/northbridge/intel/haswell/mrccache.c

@@ -222,10 +222,7 @@ static void update_mrc_cache(void *unused)
 		     current->mrc_data_size + sizeof(*current), current);
 }
 
-BOOT_STATE_INIT_ENTRIES(mrc_cache_update) = {
-	BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY,
-	                      update_mrc_cache, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, update_mrc_cache, NULL);
 #endif
 
 struct mrc_data_container *find_current_mrc_cache(void)

src/northbridge/intel/sandybridge/mrccache.c

@@ -223,10 +223,7 @@ static void update_mrc_cache(void *unused)
 		     current->mrc_data_size + sizeof(*current), current);
 }
 
-BOOT_STATE_INIT_ENTRIES(mrc_cache_update) = {
-	BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY,
-	                      update_mrc_cache, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, update_mrc_cache, NULL);
 #endif
 
 struct mrc_data_container *find_current_mrc_cache(void)

src/soc/intel/baytrail/dptf.c

@@ -49,6 +49,4 @@ static void dptf_init(void *unused)
 	reg_script_run(dptf_init_settings);
 }
 
-BOOT_STATE_INIT_ENTRIES(dptf_init_bscb) = {
-	BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, dptf_init, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, dptf_init, NULL);

src/soc/intel/baytrail/perf_power.c

@@ -288,7 +288,5 @@ static void perf_power(void *unused)
 	reg_script_run(perf_power_settings);
 }
 
-BOOT_STATE_INIT_ENTRIES(disable_rom_cache_bscb) = {
-	BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, perf_power, NULL),
-	BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, perf_power, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, perf_power, NULL);
+BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, perf_power, NULL);

src/soc/intel/baytrail/southcluster.c

@@ -568,9 +568,5 @@ static void finalize_chipset(void *unused)
 	outb(APM_CNT_FINALIZE, APM_CNT);
 }
 
-BOOT_STATE_INIT_ENTRIES(finalize_bscb) = {
-	BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY,
-	                      finalize_chipset, NULL),
-	BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT,
-	                      finalize_chipset, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, finalize_chipset, NULL);
+BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, finalize_chipset, NULL);

src/soc/intel/baytrail/spi.c

@@ -323,9 +323,7 @@ static void spi_init_cb(void *unused)
 	spi_init();
 }
 
-BOOT_STATE_INIT_ENTRIES(spi_init_bscb) = {
-        BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL);
 #endif
 
 int spi_claim_bus(struct spi_slave *slave)

src/soc/intel/broadwell/elog.c

@@ -133,6 +133,4 @@ static void pch_log_state(void *unused)
 	pch_log_wake_source(ps);
 }
 
-BOOT_STATE_INIT_ENTRIES(pch_log) = {
-	BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, pch_log_state, NULL)
-};
+BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, pch_log_state, NULL);

src/soc/intel/broadwell/finalize.c

@@ -119,9 +119,5 @@ static void broadwell_finalize(void *unused)
 	post_code(POST_OS_BOOT);
 }
 
-BOOT_STATE_INIT_ENTRIES(finalize) = {
-	BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY,
-			      broadwell_finalize, NULL),
-	BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT,
-			      broadwell_finalize, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, broadwell_finalize, NULL);
+BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_LOAD, BS_ON_EXIT, broadwell_finalize, NULL);

src/soc/intel/broadwell/spi.c

@@ -315,9 +315,7 @@ static void spi_init_cb(void *unused)
 	spi_init();
 }
 
-BOOT_STATE_INIT_ENTRIES(spi_init_bscb) = {
-        BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL);
 
 int spi_claim_bus(struct spi_slave *slave)
 {

src/soc/intel/common/mrc_cache.c

@@ -303,9 +303,6 @@ static void update_mrc_cache(void *unused)
 	}
 }
 
-BOOT_STATE_INIT_ENTRIES(mrc_cache_update) = {
-	BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY,
-	                      update_mrc_cache, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, update_mrc_cache, NULL);
 
 #endif /* defined(__PRE_RAM__) */

src/southbridge/amd/agesa/hudson/pci.c

@@ -45,10 +45,7 @@ static void set_pci_irqs(void *unused)
  * Hook this function into the PCI state machine
  * on entry into BS_DEV_ENABLE.
  */
-BOOT_STATE_INIT_ENTRIES(pci_irq_update) = {
-	BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY,
-	                      set_pci_irqs, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, set_pci_irqs, NULL);
 
 static struct pci_operations lops_pci = {
 	.set_subsystem = 0,

src/southbridge/amd/cimx/sb800/late.c

@@ -326,10 +326,7 @@ static void set_pci_irqs(void *unused)
  * Hook this function into the PCI state machine
  * on entry into BS_DEV_ENABLE.
  */
-BOOT_STATE_INIT_ENTRIES(pci_irq_update) = {
-	BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY,
-	                      set_pci_irqs, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, set_pci_irqs, NULL);
 
 /**
  * @brief SB Cimx entry point sbBeforePciInit wrapper

src/southbridge/amd/pi/hudson/pci.c

@@ -48,10 +48,7 @@ static void set_pci_irqs(void *unused)
  * Hook this function into the PCI state machine
  * on entry into BS_DEV_ENABLE.
  */
-BOOT_STATE_INIT_ENTRIES(pci_irq_update) = {
-	BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY,
-	                      set_pci_irqs, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, set_pci_irqs, NULL);
 
 static struct pci_operations lops_pci = {
 	.set_subsystem = 0,

src/southbridge/intel/common/spi.c

@@ -366,9 +366,7 @@ static void spi_init_cb(void *unused)
 	spi_init();
 }
 
-BOOT_STATE_INIT_ENTRIES(spi_init_bscb) = {
-	BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL);
 #endif
 
 int spi_claim_bus(struct spi_slave *slave)

src/southbridge/intel/lynxpoint/smi.c

@@ -135,9 +135,6 @@ static void finalize_boot(void *unused)
 	outb(0xcb, 0xb2);
 }
 
-BOOT_STATE_INIT_ENTRIES(finalize) = {
-	BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY,
-			      finalize_boot, NULL),
-};
+BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, finalize_boot, NULL);
 
 #endif