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soc/intel/tgl: deduplicate the PCIe root port map 

Make use of the helper introduced in the parent change to deduplicate
the PCIe root port table.

Change-Id: I2dae4e4caf0a7ba3662889f3b31da0c3c299bc92
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60945
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Michael Niewöhner 2022-01-09 02:20:17 +01:00 committed by Paul Fagerburg
parent 7a2bc06b12
commit 9f0285b6fe
1 changed files with 2 additions and 17 deletions
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19
src/soc/intel/tigerlake/chip.c
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@ -17,19 +17,6 @@
#include <soc/ramstage.h>
#include <soc/soc_chip.h>
static const struct pcie_rp_group pch_lp_rp_groups[] = {
{ .slot = PCH_DEV_SLOT_PCIE, .count = 8 },
{ .slot = PCH_DEV_SLOT_PCIE_1, .count = 4 },
{ 0 }
};
static const struct pcie_rp_group pch_h_rp_groups[] = {
{ .slot = PCH_DEV_SLOT_PCIE, .count = 8 },
{ .slot = PCH_DEV_SLOT_PCIE_1, .count = 8 },
{ .slot = PCH_DEV_SLOT_PCIE_2, .count = 8 },
{ 0 }
};
#if CONFIG(HAVE_ACPI_TABLES)
const char *soc_acpi_name(const struct device *dev)
{
@ -170,10 +157,8 @@ void soc_init_pre_device(void *chip_info)
soc_fill_gpio_pm_configuration();
/* Swap enabled PCI ports in device tree if needed. */
if (CONFIG(SOC_INTEL_TIGERLAKE_PCH_H))
pcie_rp_update_devicetree(pch_h_rp_groups);
else
pcie_rp_update_devicetree(pch_lp_rp_groups);
const struct pcie_rp_group *pch_rp_groups = soc_get_pch_rp_groups();
pcie_rp_update_devicetree(pch_rp_groups);
}
static void cpu_fill_ssdt(const struct device *dev)